參數(shù)資料
型號： ORLI10G3BM680-DB
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
英文描述： FPGA, 1296 CLBS, 333000 GATES, PBGA680
封裝： PLASTIC, FBGA-680
文件頁數(shù)： 12/78頁
文件大?。?/td> 1689K
代理商： ORLI10G3BM680-DB
Lattice Semiconductor
ORCA ORLI10G Data Sheet
2
Embedded Function Features
Provides a line-interface to system-interface with various system standards such as OC-192/STM-64
SONET/SDH, quad OC-48/STM-16 10 Gbits/s Ethernet, and 10 Gbits/s OTN (digital wrapper/strong FEC) or
12.5 Gbits/s SuperFEC.
Embedded PLLs with programmable M/N multiplication/division values provide exible data rate conversion
between line side and system side.
Line-side supports 16-bit LVDS data with multiple line frequencies supported up to 850 MHz, depending on sys-
tem standard.
Line-side interface, including timing and jitter specications, compliant to OIF 99.102.5 standard.
Receive-side interface can be split into four separate asynchronous 2.5 Gbits/s interfaces (4-bit LVDS data inter-
face for each) with a separate clock for each for transfer to the FPGA logic.
Data and clock rates divided by 4 or 8 for use in FPGA logic.
LVDS I/Os compliant with EIA
-644 support hot insertion. All embedded LVDS I/Os include both input and output
on-board termination to allow high-speed operation.
Low-power LVDS buffers.
Intellectual Property Features
Programmable logic provides a variety of yet-to-be standardized interface functions, including the following IP core
functions:
10 Gbits/s Ethernet Physical Coding Sublayer (PCS), as dened by IEEE 802.3ae:
– XGMII for interfacing to 10 Gbits/s Ethernet MACs. XGMII is a 156 MHz double data rate parallel short-reach
(typically less than 3 in.) interconnect interface.
– Elastic store buffers for clock domain transfer to/from the XGMII interface.
–X
59 + X39 + X1 scrambler/descrambler for 10 Gbits/s Ethernet.
– 64b/66b encoders/decoders for 10 Gbits/s Ethernet.
– Idle insertion and deletion.
– SMI interface for control and status.
Quad 2.5 Gbits/s SONET/SDH to 10 Gbits/s SONET/SDH MUX/deMUX functions.
Programmable Features
High-performance programmable logic:
– 0.16 m 7-level metal technology.
– Internal performance of >250 MHz.
–Over 400k usable FPGA system gates.
– Meets multiple I/O interface standards.
– 1.5 V operation (30% less power than 1.8 V operation) translates to greater performance.
Traditional I/O selections:
–LVTTL (3.3 V) and LVCMOS (2.5 V, and 1.8 V) I/Os.
–Per pin selectable I/O clamping diodes provide 3.3 V PCI compliance.
– Individually programmable drive capability:
24 mA sink/12 mA source, 12 mA sink/6 mA source, or 6 mA sink/3 mA source.
–Two slew rates supported (fast and slew limited).
–Fast-capture input latch and input Flip-Flop latch for reduced input setup time and zero hold time.
–Fast open-drain drive capability.
– Capability to register 3-state enable signal.
– Off-chip clock drive capability.
–Two input function generator in output path.
相關PDF資料
PDF描述
ORT82G5-1BM680 FPGA, 1296 CLBS, 380000 GATES, PBGA680
ORT82G5-2BM680 FPGA, 1296 CLBS, 380000 GATES, PBGA680
ORT82G5-3BM680 FPGA, 1296 CLBS, 380000 GATES, PBGA680
OS10040280G-012 FIBER OPTIC RECEIVER, 1290-1600nm, PANEL MOUNT, FC/APC CONNECTOR
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相關代理商/技術參數(shù)
參數(shù)描述
ORLI10G-3BMN680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORLI10G5-FPSC-EV 功能描述:可編程邏輯 IC 開發(fā)工具 ORCA ORLI10G5 FPSC Eval Brd RoHS:否 制造商:Altera Corporation 產品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓:
ORM0200-03600 N-70 制造商:SMC Corporation of America 功能描述:O-RING
ORM120A110 制造商:Ssac 功能描述:
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