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DocumentNumber:P1022DSFS/REV1
P1022 Development System
P1022QorIQcommunications processor,
builtonPowerArchitecturetechnology
Memory
64-bitdual-rankDDR3DIMMwith8-bit
ECCsupport
128MBNORflashmemory
1GB2K-blockNANDflashmemory
16MBSPIROM
256BNVRAM
PCIExpress:ThreePCIExpressinterfaces
SATA:TwoindependentSATA2.0
controllers
Ethernet:Two10/100/1000MbpsPHYs
usingRGMIIinterfaces
IEEE1588
Clockinputfromprecisionoscillator
DualI2C
Dual(internalandexternal)SDHCslot
USB:TwoUSBinterfaces
UARTs:TwoDB9connectors
SATA2
TDM:DualSLICinterfaces
GPIO:16
Two10/100/1000Ethernetconnectors
Systemlogic(PixisFPGA)
Manages system reset sequencing
Manages system bus clock speed
selections
Implements registers for system control
and monitoring
SystemandDDRclock
Canbeindependentlysettooneofeight
commonsettingsintheinterval66MHz–
166MHz
Powersupplies
PMBuscontrolledsuppliesforVDD,
SVDD/XVDD,OVDDandGVDD
Video
InternalLVDSencoderattached
800x6008"LCDpanelorDVI
Audio
Stereo24-bitI2S audio with headphone
output and microphone input
Documentation
Referencemanual
Schematics
Billofmaterials
Board-relateddocumentation
Configurationguide
Softwaretools
Linux2.6.xkernel
CrosscompileandnativeGNUtoolchain
CodeWarriorUSBTAP
P1022DS Block Diagram
DDR3
DIMM
Line
In/Out
Security
Acceleration
(optional)
XOR
System Bus
2 x Gigabit
Ethernet
2 x
SATA
2 x
USB
10/100/
1G
PHY
2-ch. DMA Controller
3 x PCI Express
3 x PCI Express
On-Chip Network
4-lane SerDes
2-lane SerDes
32 KB
L1 I-Cache
e500 Core
32 KB
L1 D-Cache
Coherency Module
256 KB
L2 Cache
32 KB
L1 I-Cache
e500 Core
32 KB
L1 D-Cache
DDR2/DDR3
SDRAM
Controller
Enhanced
Local Bus
Controller
(eLBC)
SDHC
SPI
TDM
SSI
EN
OK
Dual
RJ45
ATX
USB
Chassis
Header
RJ11
x4
PCI Express x1/x2/x4
PCI Express x2
PCI Express x1 slot/MiniPCI
I2S
Codec
ULPI
SLIC
x2
DIU
SPI Flash
SD Card
I2C
PMBus GVDD/VREF
PMBus VDD
PMBus SVDD/XVDD
PMBus OVDD
Touch Screen
SD Card
DVI Encoder
LVDS Encoder
NOR Flash
PROMJET
PIXIS
DVI
Single Link
DFP
NAND Flash
SATA
Optional