參數(shù)資料
型號： P80CE598FHB
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-bit microcontroller with CAN controller(帶CAN控制器的8位微控制器)
中文描述： 8-BIT, 16 MHz, MICROCONTROLLER, PQFP80
封裝： PLASTIC, QFP-80
文件頁數(shù)： 83/108頁
文件大?。?/td> 661K
代理商： P80CE598FHB
1996 Jun 27
83
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xCE598
Notes to the DC characteristics
1.
Conditions for:
a) The
digital
operating current measurement: all output pins disconnected; XTAL1 is driven with t
r
= t
f
= 10 ns;
V
IL
= V
SS
+ 0.5 V; V
IH
= V
DD
0.5 V; EA = RST = Port 0 = P1.6 = P1.7 = EW = V
DD
;
STADC = V
SS
; CRX0 = 2.7 V; CRX1 = 2.3 V.
b) The
analog
operating current measurement: Port 5 = AV
DD
; CAN: register 6: = 00H;
load current reference voltage source 100
μ
A.
2.
Conditions for:
a) The
digital
Idle mode supply current measurement: all output pins disconnected;
XTAL1 is driven with t
r
= t
f
= 10 ns; V
IL
= V
SS
+ 0.5 V; V
IH
= V
DD
0.5 V; Port 0 = P1.6 = P1.7 = EW = V
DD
;
EA = RST = STADC = V
SS
; CRX0 = 2.7 V; CRX1 = 2.3 V.
b) The
analog
Idle mode current measurement: Port 5 = AV
DD
; CAN: register 6: = 00H;
load current reference voltage source 100
μ
A.
3.
Conditions for:
a) The
digital
Idle and Sleep mode supply current measurement: all output pins disconnected;
XTAL1 is driven with t
r
= t
f
= 10 ns; V
IL
= V
SS
+ 0.5 V; V
IH
= V
DD
0.5 V;
Port 0 = P1.6 = P1.7 = EW = CRX0 = V
DD
; EA = RST = STADC = CRX1 = V
SS
;
CAN: register 6: = 00H, register 7: = 12H, register 8: = 02H, register 0: = 20H, wait 15t
CY
,
register 1: = 10H, wait for bit Sleep = 1.
b) The
analog
Idle and Sleep mode current measurement: Port 5 = AV
DD
;
load current reference voltage source 100
μ
A.
4.
Window devices have to be covered. Conditions for:
a) The
digital
Power-down mode supply current measurement: all output pins and Port 5 disconnected;
Port 0 = P1.6 = P1.7 = EW = CRX0 = V
DD
;
EA = RST = STADC = CRX1 = XTAL1 = AV
REF+
= AV
REF
= CV
SS
= V
SS
;
AV
DD
= V
DD
, but current into AVDD pin is not comprised in digital Power-down current.
b) The
analog
Power-down mode supply current measurement: Port 5 = AV
DD
.
5.
Capacitive loads on Port 0 and Port 2 may degrade the LOW level output voltage of ALE, Port 1 and Port 3.
During a HIGH-to-LOW transition on the Port 0 and Port 2 pins and a capacitive load
>
100 pF, the ALE LOW level
may exceed 0.8 V. In the case that it is necessary to connect ALE to a Schmitt trigger input respectively use an
address latch with a Schmitt trigger STROBE input.
CAN output driver (V
DD
= 5 V
±
5%)
V
OLT
output voltage LOW
(CTX0 and CTX1)
I
o
= 1.2 mA; note 15
I
o
= 10 mA
I
o
=
1.2 mA; note 15
I
o
=
10 mA; note 16
V
DD
0.1
V
DD
0.6
0.1
0.6
V
V
V
V
V
OHT
output voltage HIGH
(CTX0 and CTX1)
Reference (AV
DD
= 5 V
±
5%)
V
REFOUT
REF output voltage
0.1 mA
<
I
L
<
0.1 mA;
C
L
= 10 nF; note 15;
bit Reference Active = HIGH
1.5 V
<
V
REFIN
<
AV
DD
1.5 V;
bit Reference Active = LOW
1
2
AV
DD
0.1
1
2
AV
DD
+0.1
V
I
REFIN
REF input current
±
10
μ
A
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
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