參數(shù)資料
型號(hào)： P83C370
廠商： NXP Semiconductors N.V.
英文描述： Microcontrollers for NTSC TVs with On-Screen Display (OSD) and Closed Caption (CC)(在NTSC TV中應(yīng)用的具有屏幕顯示和字幕關(guān)閉特點(diǎn)的微控制器)
中文描述： 微控制器用于NTSC電視的屏幕顯示（OSD）和字幕（CC）的（在NTSC電視中應(yīng)用的具有屏幕顯示和字幕關(guān)閉特點(diǎn)的微控制器）
文件頁(yè)數(shù)： 69/80頁(yè)
文件大?。?/td> 266K
代理商： P83C370
1999 Jun 11
69
Philips Semiconductors
Product specification
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
P8xCx70 family
Table 107
Programming configuration pin descriptions
SYMBOL
PIN
I/O
DESCRIPTION
P0.0 to P0.7
P1.0/AFT0
P1.1/AFT1
P1.2/AFT2
P1.3/PWM0
1 to 8
9
10
11
12
I/O
I/O
I/O
I/O
I/O
address lines A8 to A15
Port line P1.0; alternative function as 4-bit AFT0 input
Port line P1.1; alternative function as 4-bit AFT1 input
Port line P1.2; alternative function as 4-bit AFT2 input
Port line P1.3 (open-drain, bidirectional); alternative function as 7-bit PWM
output
digital ground
address lines A7 to A0
analog ground
composite video input
Data Slicer decoupling capacitor input, connect to V
SSA
via a 100 nF capacitor.
CVBS signal black level reference, connect to V
SSA
via a 100 nF capacitor.
CVBS signal reference current input, connect to V
SSA
via a 27 k
resistor.
Program Store Enable (active LOW) is bonded out for testing purpose only.
External Access (active LOW) is bonded out for testing purpose only; this pin is
also used for the 12.75 V programming voltage supply in program/font OTP
programming modes.
Address Latch Enable is bonded out for testing purposes only; this pin is also
used for programming pulses input in program/font OTP programming modes.
Port line P1.4 (open-drain, bidirectional)
Data Slicer reference high capacitor input, connect to V
SSA
via a 100 nF
capacitor.
CC/OSD Blue colour current output
CC/OSD Green colour current output
CC/OSD Red colour current output
CC/OSD fast blanking output
TV horizontal sync input (for OSD synchronization)
TV vertical sync input (for OSD synchronization)
5 V analog power supply
5 V digital power supply
digital ground
system oscillator crystal output
system oscillator crystal input
reset input (active HIGH)
5 V digital power supply
data I/O lines, D0 to D7
V
SSD
P2.7 to P2.0
V
SSA
CVBS
STN
BLK
IREF
PSEN
V
PP
/EA
13
14 to 21
22
23
24
25
26
27
28
I/O
I
I
I
I
O
I
ALE/PROG
29
I/O
P1.4
REFH
30
31
I/O
I
B
G
R
FB
HSYNC
VSYNC
V
DDA
V
DDP
V
SSD
XO
XI
RESET
V
DDC
P3.0 to P3.7
32
33
34
35
36
37
38
39
40
41
42
43
44
O
O
O
O
I
I
I
O
I
I
I/O
45 to 52
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