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參數(shù)資料
| 型號(hào)： | P83C566BDA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST(帶 OSD和 VST的在PAL/SECAM TV中應(yīng)用的微控制器) |
| 中文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, MO-047AC, SOT-188-2, LCC-68 |
| 文件頁數(shù)： | 31/80頁 |
| 文件大?。?/td> | 266K |
| 代理商： | P83C566BDA |
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1999 Jun 11
31
Philips Semiconductors
Product specification
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
P8xCx70 family
15 7-BIT PWM DAC
The P8xCx70 has nine PWM DAC outputs (PWM0 to PWM8) for analog control e.g. volume, balance, bass, treble,
brightness, contrast, sharpness, hue and saturation.
Each PWM output generates a pulse pattern with a repetition rate of
1
128
f
PWM
. The analog value is determined by the
ratio of the HIGH-time and the repetition time. A DC voltage proportional to the PWM control setting is obtained by means
of an external integration network (low-pass filter). The polarity of each PWM output is fixed to active HIGH.
The HIGH-time of a PWMn output (within one PWM cycle time) may be calculated as shown in Equation (1).
t
HIGH
PWMn
t
0
=
(1)
Where PWMn is the contents of PWMn data latch; t
0
= 1/f
PWM
and f
PWM
=
1
4
f
xtal
.
15.1
SFRs for PWM output control
The alternative PWM functions of Port 0 pins are enabled by writing a logic 1 to the PWMnE bit of the associated Special
Function Register. When setting the PWMnE bit to a logic 0, the associated pin becomes a general I/O port line.
Table 39
SFR data registers for the 7-bit PWMs
REGISTER
ADDRESS
7
6
5
4
3
2
1
0
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
86H
96H
A6H
B6H
C6H
D6H
E6H
F6H
F5H
PWM0E
PWM1E
PWM2E
PWM3E
PWM4E
PWM5E
PWM6E
PWM7E
PWM8E
data6
data6
data6
data6
data6
data6
data6
data6
data6
data5
data5
data5
data5
data5
data5
data5
data5
data5
data4
data4
data4
data4
data4
data4
data4
data4
data4
data3
data3
data3
data3
data3
data3
data3
data3
data3
data2
data2
data2
data2
data2
data2
data2
data2
data2
data1
data1
data1
data1
data1
data1
data1
data1
data1
data0
data0
data0
data0
data0
data0
data0
data0
data0
×
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