參數(shù)資料
型號： P89LPC913
廠商： NXP Semiconductors N.V.
英文描述： 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
中文描述： 8位微控制器兩個小時80C51的核心具有1KB 3伏閃光的128字節(jié)RAM
文件頁數(shù)： 39/63頁
文件大?。?/td> 314K
代理商： P89LPC913
Philips Semiconductors
P89LPC912/913/914
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 03 — 17 December 2004
39 of 63
9397 750 14468
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.17.7
Break detect
Break detect is reported in the status register (SSTAT). A break is detected when
11 consecutive bits are sensed LOW. The break detect can be used to reset the
device.
9.17.8
Double buffering
The UART has a transmit double buffer that allows buffering of the next character to
be written to SBUF while the first character is being transmitted. Double buffering
allows transmission of a string of characters with only one stop bit between any two
characters, as long as the next character is written between the start bit and the stop
bit of the previous character.
Double buffering can be disabled. If disabled (DBMOD, i.e., SSTAT.7 = ‘0’), the UART
is compatible with the conventional 80C51 UART. If enabled, the UART allows writing
to SnBUF while the previous data is being shifted out. Double buffering is only
allowed in Modes 1, 2 and 3. When operated in Mode 0, double buffering must be
disabled (DBMOD = ‘0’).
9.17.9
Transmit interrupts with double buffering enabled (Modes 1, 2 and 3)
Unlike the conventional UART, in double buffering mode, the Tx interrupt is generated
when the double buffer is ready to receive new data.
9.17.10
The 9
th
bit (bit 8) in double buffering (Modes 1, 2 and 3)
If double buffering is disabled TB8 can be written before or after SBUF is written, as
long as TB8 is updated some time before that bit is shifted out. TB8 must not be
changed until the bit is shifted out, as indicated by the Tx interrupt.
If double buffering is enabled, TB8
must
be updated before SBUF is written, as TB8
will be double-buffered together with SBUF data.
9.18 Serial Peripheral Interface (SPI)
P89LPC912/913/914 provides another high-speed serial communication
interface—the SPI interface. SPI is a full-duplex, high-speed, synchronous
communication bus with two operation modes: Master mode and Slave mode. Up to
4.5 Mbit/s can be supported in Master or 3 Mbit/s in Slave mode. It has a Transfer
Completion Flag and Write Collision Flag Protection.
相關(guān)PDF資料
PDF描述
P89LPC914 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
P89LPC914FDH 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
P89LPC924 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter
P89LPC925 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter
P89LPC930 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P89LPC913FDH 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 1K FLASH TSSOP14
P89LPC913FDH,129 功能描述:8位微控制器 -MCU 1K FL/128B RAM/SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89LPC913FDH129 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述:
P89LPC913FDH-S 功能描述:8位微控制器 -MCU 1K FL/128B RAM/SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89LPC914 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
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