參數(shù)資料
型號(hào): P89V660FBC,557
廠商: NXP Semiconductors
文件頁數(shù): 5/90頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 16K 44-TQFP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 800
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲(chǔ)器容量: 16KB(16K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱: 568-2433
935280829557
P89V660FBC
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[1]
Unimplemented bits in SFRs (labeled ’-’) are ‘X’s (unknown) at all times. Unless otherwise specified, ‘1’s should not be written to these bits since they may be used for other
purposes in future derivatives. The reset values shown for these bits are ‘0’s although they are unknown when read.
SADEN
Serial Port Address Enable
B9H
Bit address
87[1]
86[1]
85[1]
84[1]
83[1]
82[1]
81[1]
SPCR
SPI Control Register
D5H
SPIE
SPEN
DORD
MSTR
CPOL
CPHA
SPR1
SPR0
SPSR
SPI Configuration Register
AAH
SPIF
WCOL
-
SPDAT
SPI Data
86H
SP
Stack Pointer
81H
S1DAT
I2C-bus data register
DAH
S1ADR
I2C-bus slave address register
DBH
S1ADR.6
S1ADR.5
S1ADR.4
S1ADR.3
S1ADR.2
S1ADR.1
S1ADR.0
S1GC
S1STA
I2C-bus status register
D9H
SC4
SC3
SC2
SC1
SC0
0
S1CON*
I2C-bus control register
D8H
CR2
ENS1
STA
STO
SI
AA
CR1
CR0
S2DAT
I2C-bus data register
E2H
S2ADR
I2C-bus slave address register
E3H
S2ADR.6
S2ADR.5
S2ADR.4
S2ADR.3
S2ADR.2
S2ADR.1
S2ADR.0
S2GC
S2STA
I2C-bus status register
E1H
SC24
SC23
SC22
SC21
SC20
0
S2CON*
I2C-bus control register
F8H
CR22
ENS21
STA2
STO2
SI2
AA2
CR21
CR20
Bit address
8F
8E
8D
8C
8B
8A
89
88
TCON*
Timer Control Register
88H
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Bit address
CF
CE
CD
CC
CB
CA
C9
C8
T2CON*
Timer2 Control Register
C8H
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2CP/RL2
T2MOD
Timer2 mode Control
C9H
-
ENT2
-
T2OE
DCEN
TH0
Timer 0 HIGH
8CH
TH1
Timer 1 HIGH
8DH
TH2
Timer 2 HIGH
CDH
TL0
Timer 0 LOW
8AH
TL1
Timer 1 LOW
8BH
TL2
Timer 2 LOW
CCH
TMOD
Timer 0 and 1 mode
89H
GATE
C/T
M1
M0
GATE
C/T
M1
M0
WDTRST
WatchDog Timer Reset
A6H
Table 4.
Special function registers …continued
* indicates Special Function Registers (SFRs) that are bit addressable.
Name
Description
SFR
addr.
Bit functions and addresses
MSB
LSB
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