參數(shù)資料
      型號: P90CE201
      廠商: NXP Semiconductors N.V.
      英文描述: 16-bit microcontroller
      中文描述: 16位微控制器
      文件頁數(shù): 14/77頁
      文件大小: 235K
      代理商: P90CE201
      August 1993
      14
      Philips Semiconductors
      Product specification
      16-bit microcontroller
      P90CE201
      5.5
      Stack format
      The stack format for exception processing is similar to the 68010 (rather than the 68000) although the information stored
      is not the same due to the different architecture. To handle this format the P90CE201 differs from the 68000 in that:
      The stack format has changed.
      The minimum number of words put into, or restored from, the stack is 4 (68010 compatible; not 3 as with the 68000).
      The RTE instruction decides (with the aid of the 4 format bits) whether or not more information has to be restored. The
      P90CE201 long format is used for bus error and address error exceptions; all other exceptions use the short format.
      If another format code, other than one of the two listed above, is detected during the restore action, a Format Error
      occurs.
      If the user wants to finish the instruction in which the bus or address error occurred, the P90CE201 format must be used
      on RTE. If no changes to the stack are required during exception processing, the stack format is transparent to the user.
      5.5.1
      L
      ONG AND SHORT STACK FORMATS
      Fig.7 Stack format.
      SR
      PCH/PCL
      FORMAT
      Status Register.
      Program Counter High/Low Word.
      Indicating either a short stack
      (only the first 4 words), or the long
      stack format for bus and address
      error exceptions. See Fig.9.
      The vector number of the
      exception in the vector table; e.g.
      2 for a bus error and 3 for an
      address error. See Fig.9.
      Special Status Word; see Fig.8.
      Current Move Multiple Mask.
      In the event of a faulty write cycle,
      the data can be found here.
      The address used during the faulty
      bus cycle.
      Data that has been read prior to
      the faulty cycle can in some cases
      be found here.
      Holds the current instruction
      being executed.
      Holds either the present
      instruction being executed or the
      prefetched instruction.
      VECTOR NUMBER
      SSW
      MM
      TDPH/TDPL
      TPFH/TPFL
      DBINH/DBINL
      IR
      IRC
      handbook, 4 columns
      Short
      Stack
      Format
      FORMAT (4 bits)
      VECTOR NUMBER
      Long
      Stack
      Format
      SR
      PCH
      PCL
      SSW
      MM
      INTERNAL INFORMATION
      INTERNAL INFORMATION
      TPDH
      TPFL
      DBINH
      DBINL
      INTERNAL INFORMATION
      IR
      IRC
      TPFH
      TPDL
      MCD512
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