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參數(shù)資料
| 型號(hào)： | PAL22V10Z-30I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | EPICE CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS |
| 中文描述： | EPICE CMOS可編程陣列邏輯電路 |
| 文件頁數(shù)： | 7/22頁 |
| 文件大?。?/td> | 202K |
| 代理商： | PAL22V10Z-30I |
FEEDBACK AND OUTPUT CONFIGURATION
TICPAL22V10Z-25C, TICPAL22V10Z-30I
EPIC
CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS
SRPS007C – D3323, SEPTEMBER 1989 – REVISED FEBRUARY 1992
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
7
output logic macrocell options (see Figure 1)
C1
1S
1D
R
S1 = 0
S0 = 0
C1
1S
1D
R
S1 = 0
S0 = 1
REGISTER FEEDBACK, REGISTERED, ACTIVE-LOW OUTPUT
REGISTER FEEDBACK, REGISTERED, ACTIVE-HIGH OUTPUT
S1 = 1
S0 = 0
S1 = 1
S0 = 1
I/O FEEDBACK, COMBINATIONAL, ACTIVE-LOW OUTPUT
I/O FEEDBACK, COMBINATIONAL, ACTIVE-HIGH OUTPUT
MACROCELL FEEDBACK AND OUTPUT FUNCTION TABLE
CELL SELECT
S1
0
0
1
1
0 = erased cell, 1 = programmed cell
S1 and S0 are select-function cells as shown in the output logic macrocell
diagram.
S0
0
1
0
1
Register feedback
Register feedback
I/O feedback
I/O feedback
Registered
Registered
Combinational
Combinational
Active low
Active high
Active low
Active high
Figure 1. Resultant Macrocell Feedback and Output Logic After Programming
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