參數(shù)資料
型號: PALCE20V8H-25PI/4
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: EE CMOS 24-Pin Universal Programmable Array Logic
中文描述: EE PLD, 25 ns, PDIP24
封裝: 0.300 INCH, SKINNY, PLASTIC, DIP-24
文件頁數(shù): 11/25頁
文件大?。?/td> 479K
代理商: PALCE20V8H-25PI/4
PALCE20V8 Family
19
USE
GAL
DEVICES
FOR
NEW
DESIGNS
ENDURANCE CHARACTERISTICS
The PALCE20V8 is manufactured using Vantis’ advanced electrically-erasable (EE) CMOS process.
This technology uses an EE cell to replace the fuse link used in bipolar parts. As a result, the
device can be erased and reprogrammed—a feature which allows 100% testing at the factory.
ROBUSTNESS FEATURES
The PALCE20V8X-X/5 have some unique features that make them extremely robust, especially
when operating in high-speed design environments. Pull-up resistors on inputs and I/O pins
cause unconnected pins to default to a known state. Input clamping circuitry limits negative
overshoot, eliminating the possibility of false clocking caused by subsequent ringing. A special
noise lter makes the programming circuitry completely insensitive to any positive overshoot
that has a pulse width of less than about 100 ns for the /5 versions.
Symbol
Parameter
Test Conditions
Value
Unit
tDR
Min Pattern Data Retention Time
Max Storage Temperature
10
Years
Max Operating Temperature
20
Years
N
Max Reprogramming Cycles
Normal Programming Conditions
100
Cycles
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相關代理商/技術參數(shù)
參數(shù)描述
PALCE20V8H-25PI5 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:EE CMOS 24-Pin Universal Programmable Array Logic
PALCE20V8H-5JC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:EE CMOS 24-Pin Universal Programmable Array Logic
PALCE20V8H-5JC/5 制造商:Advanced Micro Devices 功能描述:PROG. LOGIC DEVICE ELECTR. ERASABLE 20-INPUT 8-OUTPUT AND-OR 5 NS ACCESS TIM
PALCE20V8H-5JC4 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:EE CMOS 24-Pin Universal Programmable Array Logic
PALCE20V8H5JC5 制造商:LAT 功能描述:LATTICE S9G2A