參數(shù)資料
型號(hào): PALCE22V10H-20PI/4
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: 24-Pin EE CMOS (Zero Power) Versatile PAL Device
中文描述: EE PLD, 20 ns, PDIP24
封裝: 0.300 INCH, SKINNY, PLASTIC, DIP-24
文件頁數(shù): 31/34頁
文件大?。?/td> 691K
代理商: PALCE22V10H-20PI/4
6
PALCE22V10 and PALCE22V10Z Families
most of its internal circuitry. The current will go to almost zero (ICC < 30 A). The outputs will
maintain the states held before the device went into the standby mode.
When any input switches, the internal circuitry is fully enabled, and power consumption returns
to normal. This feature results in considerable power savings for operation at low to medium
frequencies. This saving is illustrated in the ICC vs. frequency graph.
Product-Term Disable
On a programmed PALCE22V10Z, any product terms that are not used are disabled. Power is cut
off from these product terms so that they do not draw current. As shown in the ICC vs. frequency
graph, product-term disabling results in considerable power savings. This saving is greater at the
higher frequencies.
Further hints on minimizing power consumption can be found in a separate document entitled,
Minimizing Power Consumption with Zero-Power PLDs.
相關(guān)PDF資料
PDF描述
PALCE22V10H-25PI/4 24-Pin EE CMOS (Zero Power) Versatile PAL Device
PALCE22V10H-15JC/4 24-Pin EE CMOS (Zero Power) Versatile PAL Device
PALCE22V10H-25JC/4 24-Pin EE CMOS (Zero Power) Versatile PAL Device
PALCE22V10H-5JC/5 24-Pin EE CMOS (Zero Power) Versatile PAL Device
PALCE22V10H-20JI/4 24-Pin EE CMOS (Zero Power) Versatile PAL Device
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