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參數(shù)資料
| 型號： | PC755CVGU350LE |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | E Core |
| 中文描述： | 32-BIT, 350 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | CERAMIC, BGA-360 |
| 文件頁數(shù)： | 4/50頁 |
| 文件大?。?/td> | 1064K |
| 代理商： | PC755CVGU350LE |
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4
PC755/745
2138D–HIREL–06/03
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Floating-point Unit and a 32-entry FPR File
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Support for IEEE-754 standard single and double precision floating point
arithmetic
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Hardware support for divide
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Hardware support for denormalized numbers
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Single-entry reservation station
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Supports non-IEEE mode for time-critical operations
System Unit
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Executes CR logical instructions and miscellaneous system instructions
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Special register transfer instructions
Load/Store Unit
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One cycle load or store cache access (byte, half-word, word, double-word)
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Effective address generation
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Hits under misses (one outstanding miss)
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Single-cycle unaligned access within double word boundary
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Alignment, zero padding, sign extend for integer register file
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Floating point internal format conversion (alignment, normalization)
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Sequencing for load/store multiples and string operations
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Store gathering
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Cache and TLB instructions
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Big and Little-endian byte addressing supported
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Misaligned Little-endian supported
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Level 1 Cache structure
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32K, 32 bytes line, 8-way set associative instruction cache (iL1)
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32K, 32 bytes line, 8-way set associative data cache (dL1)
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Cache locking for both instruction and data caches, selectable by group of
ways
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Single-cycle cache access
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Pseudo least-recently used (PLRU) replacement
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Copy-back or Write Through data cache (on a page per page basis)
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Supports all PowerPC memory coherency modes
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Non-Blocking instruction and data cache (one outstanding miss under hits)
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No snooping of instruction cache
Level 2 (L2) Cache Interface (not implemented on PC745)
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Internal L2 cache controller and tags; external data SRAMs
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256K, 512K, and 1-Mbyte 2-way set associative L2 cache support
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Copyback or write-through data cache (on a page basis, or for all L2)
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Instruction-only mode and data-only mode.
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64 bytes (256K/512K) or 128 bytes (1M) sectored line size
Single-cycle arithmetic, shifts, rotates, logical
Multiply and divide support (multi-cycle)
Early out multiply
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PC755CVGU366LE | E Core |
| PC755CVGU400LE | E Core |
| PC755CVGHU300LE | PowerPC 755/745 RISC Microprocessor |
| PC755CVGHU350LE | PowerPC 755/745 RISC Microprocessor |
| PC755CVGHU366LE | PowerPC 755/745 RISC Microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PC755CVGU366LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
| PC755CVGU400LE | 制造商:e2v technologies 功能描述:MPU RISC 32BIT 0.22UM 400MHZ 2.5V/3.3V 360CBGA - Trays |
| PC755CVZFU300LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
| PC755CVZFU350LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
| PC755CVZFU366LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
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