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參數(shù)資料
| 型號： | PC755CVGU350LE |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | E Core |
| 中文描述： | 32-BIT, 350 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | CERAMIC, BGA-360 |
| 文件頁數(shù)： | 47/50頁 |
| 文件大?。?/td> | 1064K |
| 代理商： | PC755CVGU350LE |
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47
PC755/745
2138D–HIREL–06/03
Alternately, the following is another method to determine the output impedance of the
PC755. A voltage source, V
force
, is connected to the output of the PC755 as in Figure 33.
Data is held low, the voltage source is set to a value that is equal to (L2)O
V
DD
/2 and the
current sourced by V
force
is measured. The voltage drop across the pull-down device,
which is equal to (L2)O
V
DD
/2, is divided by the measured current to determine the output
impedance of the pull-down device, R
N
. Similarly, the impedance of the pull-up device is
determined by dividing the voltage drop of the pull-up, (L2)O
V
DD
/2, by the current sank
by the pull-up when the data is high and V
force
is equal to (L2)O
V
DD
/2. This method can
be employed with either empirical data from a test set up or with data from simulation
models, such as IBIS.
R
P
and R
N
are designed to be close to each other in value. Then Z
0
= (R
P
+ R
N
)/2.
Figure 33 describes the alternate driver impedance measurement circuit.
Figure 33.
Alternate Driver Impedance Measurement Circuit
Table 20 summarizes the signal impedance results. The driver impedance values were
characterized at 0
°
C, 65
°
C, and 105
°
C. The impedance increases with junction temper-
ature and is relatively unaffected by bus voltage.
Pull
–
up Resistor
Requirements
The PC755 requires pull-up resistors (1 k
– 5 k
) on several control pins of the bus
interface to maintain the control signals in the negated state after they have been
actively negated and released by the processor or other bus masters. These pins are
TS, ABB, AACK, ARTRY, DBB, DBWO, TA, TEA, and DBDIS. DRTRY should also be
connected to a pull-up resistor (1 k
– 5 k
) if it will be used by the system; otherwise,
this signal should be connected to HRESET to select NO-DRTRY mode.
Three test pins also require pull-up resistors (100
– 1 k
). These pins are
L1_TSTCLK, L2_TSTCLK, and LSSD_MODE. These signals are for factory use only
and must be pulled up to OV
DD
for normal machine operation.
Table 20.
Impedance Characteristics
V
DD
= 2.0V, OV
DD
= 3.3V, T
c
= 0 - 105
°
C
Impedance
Processor bus
L2 bus
Symbol
Unit
RN
25-36
25-36
Z
0
W
RP
26-39
26-39
Z
0
W
(L2)OVDD
BGA
Pin
Data
OGND
Vforce
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PC755CVGU366LE | E Core |
| PC755CVGU400LE | E Core |
| PC755CVGHU300LE | PowerPC 755/745 RISC Microprocessor |
| PC755CVGHU350LE | PowerPC 755/745 RISC Microprocessor |
| PC755CVGHU366LE | PowerPC 755/745 RISC Microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PC755CVGU366LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
| PC755CVGU400LE | 制造商:e2v technologies 功能描述:MPU RISC 32BIT 0.22UM 400MHZ 2.5V/3.3V 360CBGA - Trays |
| PC755CVZFU300LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
| PC755CVZFU350LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
| PC755CVZFU366LE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 755/745 RISC Microprocessor |
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