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參數(shù)資料
| 型號： | PC8245MTPU333D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Integrated Processor Family |
| 中文描述： | 32-BIT, 333 MHz, RISC PROCESSOR, PBGA352 |
| 封裝： | 35 X 35 MM, 1.27 MM PITCH, TBGA-352 |
| 文件頁數(shù)： | 22/61頁 |
| 文件大?。?/td> | 429K |
| 代理商： | PC8245MTPU333D |
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22
PC8245
2171D–HIREL–06/04
Power Characteristics
Table 3 provides power consumption data for the PC8245.
Notes:
1. The values include V
DD
, AV
DD
, and AV
DD
2 but do not include I/O supply power, see Section “Power Supply Sizing” on page
49, for information on OV
DD
and GV
DD
supply power. Values shown in parenthesis ( ) indicate power consumption at
V
DD
/AV
DD
/AV
DD
2 = 1.8V
2. Maximum – FP power is measured at V
DD
= 2.1V with dynamic power management enabled while running an entirely cache-
resident, looping, floating-point multiplication instruction.
3. Maximum – INT power is measured at V
DD
= 2.1V with dynamic power management enabled while running entirely cache-
resident, looping, integer instructions.
4. Power saving mode maximums are measured at V
DD
= 2.1V while the device is in doze, nap, or sleep mode.
5. Typical power is measured at V
DD
= AV
DD
= 2.0V, OV
DD
= 3.3V where a nominal FP value, a nominal INT value, and a value
where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit boundaries to local memory are
averaged.
6. Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled
7. The typical minimum I/O power values were results of the PC8245 performing cache resident integer operations at the slow-
est frequency combination of 33:66:200 (PCI:Mem:CPU) MHz
8. The typical maximum OV
DD
value resulted from the PC8245 operating at the fastest frequency combination of 66:100:350
(PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and zeros to PCI memory.
9. The typical maximum GV
DD
value resulted from the PC8245 operating at the fastest frequency combination of 66:100:350
(PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and zeros on 64-bit bound-
aries to local memory.
10. Power consumption of PLL supply pins (AV
DD
and AV
DD
2) < 15 mW. Guaranteed by design and is not tested.
Table 3.
Power Consumption
Mode
PCI Bus Clock/Memory Bus Clock
CPU Clock Frequency (MHz)
Unit
Notes
66/66/266
66/133/266
66/66/300
66/100/300
33/83/333
66/133/333
Typical
1.7
(1.5)
2.0
(1.8)
1.8
(1.7)
2.0
(1.8)
2.0
2.3
W
(1)(5)
Max – FP
2.2
(1.9)
2.4
(2.1)
2.3
(2.))
2.5
(2.2)
2.6
2.8
W
(1)(2)
Max – INT
1.8
(1.6)
2.1
(1.8)
2.0
(1.8)
2.1
(1.8)
2.2
2.4
W
(1)(3)
Doze
1.1
(1.0)
1.4
(1.3)
1.2
(1.1)
1.4
(1.3)
1.4
1.6
W
(1)(4)(6)
Nap
0.4
(0.4)
0.7
(0.7)
0.4
(0.4)
0.6
(0.6)
0.5
0.7
W
(1)(4)(6)
Sleep
0.2
(0.2)
0.4
(0.4)
0.2
(0.4)
0.3
(0.3)
0.3
0.4
W
(1)(4)(6)
I/O Power Supplies
(10)
Mode
Minimum
Maximum
Unit
Notes
Typ – OV
DD
134 (121)
334 (301)
mW
(7)(8)
Typ – GV
DD
324 (292)
800 (720)
mW
(7)(9)
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