參數(shù)資料
型號: PCA1070
廠商: NXP Semiconductors N.V.
英文描述: Multistandard programmable analog CMOS transmission IC
中文描述: 多標準傳輸可編程模擬CMOS集成電路
文件頁數(shù): 22/36頁
文件大?。?/td> 180K
代理商: PCA1070
1997 Jun 20
22
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
OMIC:
MICROPHONE PREAMPLIFIER OUTPUT
Z
OMIC
G
OMIC
output impedance
gain from MIC+/MIC
to
OMIC
400
20
dB
dynamic limiter not active; note 13
LN:
SENDING CHANNEL OUTPUT
;
notes 14 and 15
BRL
balance return loss Z
LN
with Z
ref
= 220
+
(820
// 115 nF)
Z
line
=
; f = 300 Hz
Z
line
=
; f = 1 kHz
Z
line
=
; f = 3.4 kHz
20
20
20
37
35
25
dB
dB
dB
Selectable values for Z
set
= R
a
+ (R
b
// C) with C = 1/(2
π ×
R
b
×
f
p
); note 16
R
a
non-shunted resistance of
Z
set
R
a(min)
minimum selectable value
for R
a
R
a(max)
maximum selectable
value for R
a
R
a(step)
step resolution for R
a
R
b
shunted resistance of Z
set
R
b(min)
minimum selectable value
for R
b
R
b(max)
maximum selectable
value for R
b
R
b(step)
step resolution for R
b
f
p
pole frequency
determining shunt
capacitance C
f
p(min)
minimum selectable f
p
f
p(max)
maximum selectable f
p
n
multiplication factor for f
p
v
LN(noise)
noise output voltage
200
ZSAx = 001; note 17
0
ZSAx = 11x
600
100
800
600
ZSBx = 001; notes 17 and 18
ZSBx = 1x1
1000
100
1915
Hz
ZSPx = 0000
ZSPx = 0111; note 19
f
p
(x + 1) = n
×
[f
p
(x)]
psophometrically weighted
(O41 curve)
828
5859
1.322
76
Hz
Hz
dBmp
Dynamic limiter
V
LN(p-p)
threshold of dynamic
limiter (peak-to-peak)
3.1
2.2
3.5
2.6
2.4
3.9
3.0
V
V
V
DLT = 1
low voltage condition;
V
SLPE
= 3.1 V
low current condition; I
line
= 9 mA
V
i
= 12 mV (RMS) + 10 dB
2.6
2.5
5.0
V
%
THD
total harmonic distortion
Dynamic behaviour of limiter; note 20
t
att
t
rel
attack time
release time
V
i
steps from 12 to 38 mV (RMS)
V
i
steps from 38 to 12 mV (RMS)
1.5
90
ms
ms
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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