參數資料
型號: PCA1070
廠商: NXP Semiconductors N.V.
英文描述: Multistandard programmable analog CMOS transmission IC
中文描述: 多標準傳輸可編程模擬CMOS集成電路
文件頁數: 5/36頁
文件大?。?/td> 180K
代理商: PCA1070
1997 Jun 20
5
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
FUNCTIONAL DESCRIPTION
All values in the Chapter “Functional description” are
typical unless stated otherwise.
Line interface
DC
VOLTAGE DROP
Power for the PCA1070 and its peripheral circuits is
obtained from the telephone line. The IC develops its own
supply voltage at V
DD
and regulates its DC voltage drop
between pins SLPE and V
SS
. This voltage (V
SLPE
) can be
programmed via the I
2
C-bus interface between
3.1 to 5.9 V and is default at 4.7 V (see Table 8).
The DC line voltage at pin LN can be calculated using the
following equation:
V
LN
= V
SLPE
+ (I
line
I
LN
)
×
R
LN-SLPE
where:
I
LN
= DC bias current flowing into pin LN
(
3 mA if I
line
> 17 mA)
R
LN-SLPE
= external 20
resistor between
LN and SLPE.
At line currents below 6 mA the DC voltage V
SLPE
is
automatically adjusted to a lower value. This means that
the operation of more sets, connected in parallel, is
possible with reduced sending and receiving levels and
relaxed performance. At line currents below 16 mA the DC
bias current I
LN
is reduced from
3 mA to a lower value to
ensure maximum possible transmit level capability under
all line current conditions.
S
ET IMPEDANCE
In normal conditions I
line
>> I
LN
and the static behaviour is
equivalent to a voltage regulator diode with a series
resistor R
LN-SLPE
. In the audio frequency range the
dynamic impedance Z
LN
is determined mainly by the
internal component Z
set
= R
a
+ (R
b
// C). The equivalent
impedance Z
LN
is shown in Fig.3. The values of R
a
, R
b
and C can be programmed via the I
2
C-bus interface
(see Tables 9, 10 and 11).
where:
C
a
= DC blocking capacitor (influence negligible at
f
300 Hz for given value of C
LSI
)
C
LSI
= capacitor at pin LSI (100 nF)
C
P
= internal capacitor (12 nF)
C
REG
= capacitor at pin REG (470 nF)
L
eq
= artificial inductor
(= R
P
×
R
LN-SLPE
×
C
REG
= 10.1 H at V
SLPE
= 4.7 V)
R
LN-SLPE
= DC slope resistance (20
)
R
P
= internal resistor (1075 k
at V
SLPE
= 4.7 V)
R
LSI
= internal resistor (240 k
).
S
UPPLY FOR PERIPHERAL CIRCUITS
The supply voltage V
DD
can be used for peripheral
circuitry. The supply capabilities depend on the
programmed DC voltage drop V
SLPE
and on several other
parameters as given in the following equation:
V
DD
= V
SLPE
(I
DD
+ I
p
+ I
VP
)
×
R
SLPE
VDD
where:
I
DD
= internal current consumption PCA1070 (2.3 mA)
I
p
= current to peripheral circuitry
I
VP
= current taken from V
P
for electret microphone
R
SLPE
VDD
= external resistor between SLPE and V
DD
.
Fig.3 Equivalent impedance Z
LN
.
handbook, halfpage
MGE342
VSS
VSLPE
SLPE
RLN-SLPE
Ra
LN
Rb
Ca
Zset
C
Leq
RP
REG
LSI
CP
CREG
CLSI
RLSI
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