參數(shù)資料
型號: PCA9504A
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Glue chip 4
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56
封裝: 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP-56
文件頁數(shù): 4/29頁
文件大?。?/td> 146K
代理商: PCA9504A
Philips Semiconductors
Product data
PCA9504A
Glue chip 4
2004 May 11
4
PIN DESCRIPTION CONTINUED
PIN(S)
SYMBOL
FUNCTION
50
51
52
53
3I
5O
5O
AI
VSYNC_3V
HSYNC_5V
VSYNC_5V
V
CCP
_VREF
VSYNCH input from chipset video
HSYNCH output to monitor
VSYNCH output to monitor
Analog voltage reference for determining INIT/A20M input thresh-
olds
Strapping option for GP or FLUSH mode (internal pull-up resistor)
Note 1
Generic logic gate 3 input
Generic logic gate 3 output
54
3IV/3O
STRAP
55
56
NOTE:
1. The pin is internally pulled up to default to FLUSH mode.
5I
5V OD
GP3_IN
GP3_OUT
TYPE
DESCRIPTION
3I
3IU
5I
5IU
5ID
P
G
3O
5O
3V OD
5V OD
AO
AI
3IOD
5IOD
REFL
3.3 V input signal
3.3 V input signal with internal pull-up
5 V input signal
5 V input signal with internal pull-up
5 V input signal with internal pull-down
Power (input)
Ground (input)
3.3 V output signal
5 V output signal
3.3 V open-drain output signal
5 v open-drain output signal
Analog output
Analog input
3.3 V input/output open-drain
5 V input/output open-drain
Input voltage levels referenced to V
CCP
_VREF
FUNCTION TABLES
Strapping Selection Pin
STRAP (pin 54)
1
1 No connect
1 No connect
1 No connect
1 No connect
1 No connect
0 GND
0 GND
0 GND
0 GND
0 GND
NOTE:
1. The pin is internally pulled up to default to FLUSH mode.
MODE
1
PIN NAME & (PIN NUMBER)
FLUSH
FLUSH
FLUSH
FLUSH
FLUSH
GP
GP
GP
GP
GP
GPO_FLUSH_CACHE (4)
A20M (5)
INIT (6)
FLUSH_OUT_CPU (7)
INIT_OUT (8)
GP2_IN (4)
GP1_INB (5)
GP1_INA (6)
GP1_OUT (7)
GP2_OUT (8)
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