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參數(shù)資料
型號(hào): PCA9534PW/DG,118
廠商: NXP Semiconductors
文件頁(yè)數(shù): 23/25頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C/SMBU 16TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: *
PCA9534_3
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 6 November 2006
7 of 25
NXP Semiconductors
PCA9534
8-bit I2C-bus and SMBus low power I/O port with interrupt
6.5 Device address
6.6 Bus transactions
Data is transmitted to the PCA9534 registers using the Write mode as shown in Figure 8
and Figure 9. Data is read from the PCA9534 registers using the Read mode as shown in
Figure 10 and Figure 11. These devices do not implement an auto-increment function, so
once a command byte has been sent, the register which was addressed will continue to
be accessed by reads until a new command byte has been sent.
Remark: At power-on reset, all registers return to default values.
Fig 6.
Simplied schematic of IO0 to IO7
VDD
IO0 to IO7
output port
register data
configuration
register
DQ
CK
Q
data from
shift register
write configuration
pulse
output port
register
DQ
CK
write pulse
polarity inversion
register
DQ
CK
data from
shift register
write polarity
pulse
input port
register
DQ
CK
read pulse
input port
register data
polarity inversion
register data
002aac470
FF
data from
shift register
FF
Q1
Q2
VSS
to INT
Fig 7.
PCA9534 device address
002aac471
0
1
0
A2
A1
A0 R/W
fixed
slave address
hardware
selectable
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