參數(shù)資料
型號(hào): PCA9537
廠商: NXP Semiconductors N.V.
英文描述: 4-bit I2C and SMBus low power I/O port with interrupt and reset
中文描述: 4位I2C和SMBus低功率的I / O端口中斷和復(fù)位
文件頁數(shù): 5/17頁
文件大小: 163K
代理商: PCA9537
Philips Semiconductors
4-bit I
2
C and SMBus low power I/O port
with interrupt and reset
Product data sheet
PCA9537
2004 Nov 29
5
SIMPLIFIED SCHEMATIC OF I/O0 TO I/O3
WRITE PULSE
DATA FROM
SHIFT REGISTER
WRITE
CONFIGURATION
PULSE
D
C
K
FF
Q
D
C
K
Q
FF
D
C
K
Q
FF
D
C
K
Q
FF
INPUT PORT
REGISTER
POLARITY
INVERSION
REGISTER
OUTPUT
PORT
REGISTER
DATA FROM
SHIFT REGISTER
DATA FROM
SHIFT REGISTER
WRITE
POLARITY
PULSE
CONFIGURATION
REGISTER
OUTPUT PORT
REGISTER DATA
INPUT PORT
REGISTER DATA
POLARITY
REGISTER DATA
READ PULSE
SW02325
Q
Q
Q
Q
TO INT
Q1
Q2
V
DD
ESD PROTECTION DIODE
ESD PROTECTION DIODE
I/O0 TO I/O3
V
SS
NOTE:
At Power-on Reset, all registers return to default values.
Figure 3. Simplified schematic of I/O0 to I/O3
I/O port
When an I/O is configured as an input, FETs Q1 and Q2 are off,
creating a high-impedance input. The input voltage may be raised
above V
DD
to a maximum of 5.5 V.
If the I/O is configured as an output, then either Q1 or Q2 is enabled,
depending on the state of the output port register. Care should be
exercised if an external voltage is applied to an I/O configured as an
output because of the low-impedance paths that exist between the
pin and either V
DD
or V
SS
.
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