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參數(shù)資料
| 型號： | PCA9575PW2,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 14/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I2C/SMBUS 16BIT GPIO 28TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | I²C Bus Fundamentals |
| 特色產(chǎn)品： | NXP - I2C Interface |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 16 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 1.1 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 包括： | POR |
| 其它名稱： | 568-6647-6 |
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PCA9575_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 9 November 2009
21 of 38
NXP Semiconductors
PCA9575
16-bit I2C-bus and SMBus, level translating, low voltage GPIO
8.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up time and hold
time must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 11. System conguration
002aaa966
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
I2C-BUS
MULTIPLEXER
SLAVE
Fig 12. Acknowledgement on the I2C-bus
002aaa987
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9600D | 功能描述:緩沖器和線路驅(qū)動器 FM+ BUS BUFFER RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| PCA9600D,112 | 功能描述:緩沖器和線路驅(qū)動器 FM+ BUS BUFFER RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| PCA9600D,118 | 功能描述:緩沖器和線路驅(qū)動器 FM+ BUS BUFFER RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| PCA9600D118 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| PCA9600DP | 制造商:NXP Semiconductors 功能描述:IC BUS BUFFER BI-DIR DUAL 制造商:NXP Semiconductors 功能描述:IC, BUS BUFFER, BI-DIR, DUAL, 8TSSOP 制造商:NXP Semiconductors 功能描述:IC, BUS BUFFER, BI-DIR, DUAL, 8TSSOP; Logic Device Type:Bidirectional; Supply Voltage Min:2.5V; Supply Voltage Max:15V; Logic Case Style:TSSOP; No. of Pins:8; Operating Temperature Min:-40C; Operating Temperature Max:85C; MSL:MSL 1;RoHS Compliant: Yes |
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