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參數(shù)資料
型號： PCA9575PW2,118
廠商： NXP Semiconductors
文件頁數(shù)： 37/38頁
文件大?。?/td> 0K
描述： IC I2C/SMBUS 16BIT GPIO 28TSSOP
產品培訓模塊： I²C Bus Fundamentals
特色產品： NXP - I2C Interface
標準包裝： 1
接口： I²C，SM 總線
輸入/輸出數(shù)： 16
中斷輸出： 是
頻率 - 時鐘： 400kHz
電源電壓： 1.1 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應商設備封裝： 28-TSSOP
包裝： 標準包裝
包括： POR
其它名稱： 568-6647-6
PCA9575_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 9 November 2009
8 of 38
NXP Semiconductors
PCA9575
16-bit I2C-bus and SMBus, level translating, low voltage GPIO
7.
Functional description
7.1 I/O ports
The 16 I/O ports are organized as two banks of 8 ports each. The system master can
enable the I/Os as either inputs or outputs by writing to the I/O conguration register bits.
The data for each input or output is kept in the corresponding Input or Output register. The
polarity of the read register can be inverted with the Polarity Inversion register. Either a
bus-hold function or pull-up/pull-down feature can be selected by programming
corresponding registers. A bus-hold provides a valid logic level when the I/O bus is not
actively driven. It consists of a pair of buffers, one being weak (low drive-strength), that
latch the input at the last driven value. This prevents the input from oating while it is being
driven by a 3-state output. Latching the last valid logic state of input prevents it from
settling at a midpoint between VDD and ground that in turn consumes power. An active bus
driver can easily override the logic level set by the bus-keeper.
When bus-hold feature is not selected, the I/O ports can be congured to have pull-up or
pull-down by programming the pull-up/pull-down conguration register.
7.2 Device address
Following a START condition, the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). Address conguration for
the device depends on the package type chosen. The device offered in a 24-pin package
will have a xed slave address for the PCA9575 as shown in Figure 6.
The last bit of the rst byte denes the operation to be performed. When set to logic 1 a
read is selected, while logic 0 selects a write operation.
The slave address for the 28-pin version of the PCA9575 is shown in Figure 7.
Fig 6.
PCA9575 device address for 24-pin version
Fig 7.
PCA9575 device address for 28-pin version
002aad567
0
1
0
R/W
fixed
slave address
002aad583
0
1
0
A3
A2
A1
A0 R/W
fixed
slave address
hardware selectable
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相關代理商/技術參數(shù)
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PCA9600D,112 功能描述:緩沖器和線路驅動器 FM+ BUS BUFFER RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel
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