參數(shù)資料
型號(hào): PCA9670PW,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 35/35頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16TSSOP
產(chǎn)品培訓(xùn)模塊: LED Controllers
I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標(biāo)準(zhǔn)包裝: 96
接口: I²C
輸入/輸出數(shù): 8
中斷輸出: 無(wú)
頻率 - 時(shí)鐘: 1MHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
包括: POR
產(chǎn)品目錄頁(yè)面: 826 (CN2011-ZH PDF)
其它名稱(chēng): 568-4189-5
935282716112
PCA9670PW
PCA9670
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 30 May 2013
9 of 35
NXP Semiconductors
PCA9670
Remote 8-bit I/O expander for Fm+ I2C-bus with reset
The I2C-bus master must interpret a non-acknowledge from the PCA9670 (at any time) as
a ‘Software Reset Abort’. The PCA9670 does not initiate a reset of its registers.
The unique sequence that initiates a Software Reset is described in Figure 9.
Simple code for Software Reset:
<S> <00h> <ACK> <06h> <ACK> <P>
7.2.2 Device ID (PCA9670 ID field)
The Device ID field is a 3-byte read-only (24 bits) word giving the following information:
12 bits with the manufacturer name, unique per manufacturer (for example, NXP).
9 bits with the part identification, assigned by manufacturer.
3 bits with the die revision, assigned by manufacturer (for example, Rev X).
The Device ID is read-only, hardwired in the device and can be accessed as follows:
1. START command
2. The master sends the Reserved Device ID I2C-bus address ‘1111 100’ with the R/W
bit set to 0 (write).
3. The master sends the I2C-bus slave address of the slave device it needs to identify.
The LSB is a ‘Don’t care’ value. Only one device must acknowledge this byte (the one
that has the I2C-bus slave address).
4. The master sends a Re-START command.
Remark: A STOP command followed by a START command will reset the slave state
machine and the Device ID read cannot be performed.
Remark: A STOP command or a Re-START command followed by an access to
another slave device will reset the slave state machine and the Device ID read cannot
be performed.
5. The master sends the Reserved Device ID I2C-bus address ‘1111 100’ with the R/W
bit set to 1 (read).
6. The device ID read can be done, starting with the 12 manufacturer bits (first byte +
4 MSB of the second byte), followed by the 9 part identification bits and then the 3 die
revision bits (3 LSB of the third byte).
7. The master ends the reading sequence by NACKing the last byte, thus resetting the
slave device state machine and allowing the master to send the STOP command.
Fig 9.
Software Reset sequence
002aac263
0
A
S
0
SWRST Call I2C-bus address
START condition
R/W
acknowledge
from slave(s)
0
1
0
SWRST data = 06h
A
acknowledge
from slave(s)
P
PCA9670 is(are) reset.
Registers are set to default power-up values.
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