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參數(shù)資料
| 型號： | PCA9670PW,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 5/35頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16TSSOP |
| 產(chǎn)品培訓模塊： | LED Controllers I²C Bus Fundamentals |
| 特色產(chǎn)品： | NXP - I2C Interface |
| 標準包裝： | 96 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 無 |
| 頻率 - 時鐘： | 1MHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 包括： | POR |
| 產(chǎn)品目錄頁面： | 826 (CN2011-ZH PDF) |
| 其它名稱： | 568-4189-5 935282716112 PCA9670PW |
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PCA9670
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 30 May 2013
13 of 35
NXP Semiconductors
PCA9670
Remote 8-bit I/O expander for Fm+ I2C-bus with reset
8.3 Reading from a port (Input mode)
The port must have been previously written to logic 1, which is the condition after
power-on reset or hardware reset or software reset. To enter the Read mode the master
(microcontroller) addresses the slave device and sets the last bit of the address byte to
logic 1 (address byte read). The slave will acknowledge and then send the data byte to
the master. The master will NACK and then send the STOP condition or ACK and read the
input register again.
The read of any pin being used as an output will indicate HIGH or LOW depending on the
actual state of the input pin.
If the data on the input port changes faster than the master can read, this data may be
lost. The DATA 2 and DATA 3 are lost because these data did not meet the set-up time
and hold time (see Figure 14).
8.4 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9670 in
a reset condition until VDD has reached VPOR. At that point, the reset condition is released
and the PCA9670 registers and I2C-bus/SMBus state machine will initialize to their default
states of all I/Os to inputs with weak current source to VDD. Thereafter VDD must be
lowered below VPOR and back up to the operation voltage for power-on reset cycle.
8.5 RESET input
A reset can be accomplished by holding the RESET pin LOW for a minimum of tw(rst). The
PCA9670 registers and I2C-bus state machine will be held in their default state until the
RESET input is once again HIGH. This RESET input pin requires a pull-up resistor to VDD
if no active connection is used.
A LOW-to-HIGH transition of SDA while SCL is HIGH is defined as the STOP condition (P). Transfer of data can be stopped at
any moment by a STOP condition. When this occurs, data present at the last acknowledge phase is valid (Output mode). Input
data is lost.
Fig 14. Read input port register
A5 A4 A3 A2 A1 A0
1
A
SA6
slave address
START condition
R/W
acknowledge
from slave
002aac266
data from port
A
acknowledge
from master
SDA
1
no acknowledge
from master
read from port
data at port
data from port
DATA 1
DATA 4
DATA 2
DATA 3
P
STOP
condition
th(D)
tsu(D)
DATA 1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9670PW-T | 功能描述:接口-I/O擴展器 8-BIT I2C FM+ QB GPIO INT PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9671BQ,118 | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9671BQ-T | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO FM+I2C-RESET RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9671BS,118 | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9671BS-T | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO FM+I2C-RESET RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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