參數(shù)資料
型號(hào): PCA9674TS
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt
中文描述: 8 I/O, PIA-GENERAL PURPOSE, PDSO20
封裝: 4.40 MM, PLASTIC, MO-152, SOT266-1, SSOP-20
文件頁(yè)數(shù): 16/34頁(yè)
文件大?。?/td> 179K
代理商: PCA9674TS
PCA9674_PCA9674A_2
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 12 October 2006
16 of 34
NXP Semiconductors
PCA9674/74A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
9.
Characteristics of the I
2
C-bus
The I
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
9.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Figure 17
).
9.1.1
START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
Figure 18
.)
9.2 System configuration
A device generating a message is a ‘transmitter'; a device receiving is the ‘receiver'. The
device that controls the message is the ‘master' and the devices which are controlled by
the master are the ‘slaves' (see
Figure 19
).
Fig 17. Bit transfer
mba607
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig 18. Definition of START and STOP conditions
mba608
SDA
SCL
P
STOP condition
SDA
SCL
S
START condition
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