參數(shù)資料
型號(hào): PCA9674TS
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt
中文描述: 8 I/O, PIA-GENERAL PURPOSE, PDSO20
封裝: 4.40 MM, PLASTIC, MO-152, SOT266-1, SSOP-20
文件頁(yè)數(shù): 20/34頁(yè)
文件大小: 179K
代理商: PCA9674TS
PCA9674_PCA9674A_2
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 12 October 2006
20 of 34
NXP Semiconductors
PCA9674/74A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
12. Static characteristics
[1]
The power-on reset circuit resets the I
2
C-bus logic with V
DD
< V
POR
and sets all I/Os to logic 1 (with current source to V
DD
).
Each bit must be limited to a maximum of 25 mA and the total package limited to 200 mA due to internal busing limits.
[2]
[3]
The value is not tested, but verified on sampling basis.
Table 8.
V
DD
= 2.3 V to 5.5 V; V
SS
= 0 V; T
amb
=
40
°
C to +85
°
C; unless otherwise specified.
Symbol
Parameter
Supplies
V
DD
supply voltage
I
DD
supply current
Static characteristics
Conditions
Min
Typ
Max
Unit
2.3
-
-
200
5.5
500
V
μ
A
Operating mode; no load;
V
I
= V
DD
or V
SS
; f
SCL
= 1 MHz;
AD0, AD1, AD2 = static H or L
Standby mode; no load;
V
I
= V
DD
or V
SS
; f
SCL
= 0 kHz
I
stb
standby current
-
4.5
10
μ
A
V
POR
Input SCL; input/output SDA
V
IL
LOW-level input voltage
V
IH
HIGH-level input voltage
I
OL
LOW-level output current
power-on reset voltage
[1]
-
1.8
2.0
V
0.5
0.7V
DD
20
25
30
1
-
-
-
35
44
57
-
5
+0.3V
DD
5.5
-
-
-
+1
10
V
V
mA
mA
mA
μ
A
pF
V
OL
= 0.4 V; V
DD
= 2.3 V
V
OL
= 0.4 V; V
DD
= 3.0 V
V
OL
= 0.4 V; V
DD
= 4.5 V
V
I
= V
DD
or V
SS
V
I
= V
SS
I
L
C
i
I/Os; P0 to P7
I
OL
leakage current
input capacitance
LOW-level output current
V
OL
= 0.5 V; V
DD
= 2.3 V
V
OL
= 0.5 V; V
DD
= 3.0 V
V
OL
= 0.5 V; V
DD
= 4.5 V
V
OL
= 0.5 V; V
DD
= 4.5 V
V
OH
= V
SS
[2]
12
26
33
40
-
138
1.0
2.1
2.1
-
-
-
200
300
-
10
10
mA
mA
mA
mA
μ
A
mA
pF
pF
[2]
17
[2]
25
I
OL(tot)
I
OH
I
trt(pu)
C
i
C
o
Interrupt INT (see
Figure 15
and
Figure 14
)
I
OL
LOW-level output current
C
o
output capacitance
Inputs AD0, AD1, AD2
V
IL
LOW-level input voltage
V
IH
HIGH-level input voltage
I
LI
input leakage current
C
i
input capacitance
total LOW-level output current
HIGH-level output current
transient boosted pull-up current V
OH
= V
SS
; see
Figure 14
input capacitance
output capacitance
[2]
-
30
0.5
[3]
-
[3]
-
V
OL
= 0.4 V
3.0
-
-
3
-
5
mA
pF
0.5
0.7V
DD
1
-
-
-
-
3.5
+0.3V
DD
5.5
+1
5
V
V
μ
A
pF
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