參數(shù)資料
型號: PCA9698
廠商: NXP Semiconductors N.V.
英文描述: 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
中文描述: 40位調(diào)頻I2C總線先進的I / O復(fù)位,光電和INT端口
文件頁數(shù): 2/47頁
文件大?。?/td> 214K
代理商: PCA9698
PCA9698_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 19 July 2006
2 of 47
Philips Semiconductors
PCA9698
40-bit Fm+ I
2
C-bus advanced I/O port with RESET, OE and INT
I
2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
I
40 configurable I/O pins that default to inputs at power-up
I
Outputs:
N
Programmable totem-pole (10 mA source, 25 mA sink) or open-drain (25 mA sink)
with controlled edge rate output structure. Default to totem-pole on power-up.
N
Active LOW Output Enable (OE) input pin 3-states all outputs. Polarity can be
programmed to active HIGH through the I
2
C-bus. Defaults to OE on power-up.
N
Output state change programmable on the Acknowledge or the STOP Command to
update outputs byte-by-byte or all at the same time respectively. Defaults to
Acknowledge on power-up.
I
Inputs:
N
Open-drain active LOW Interrupt (INT) output pin allows monitoring of logic level
change of pins programmed as inputs
N
Programmable Interrupt Mask Control for input pins that do not require an interrupt
when their states change
N
Polarity Inverter register allows inversion of the polarity of the I/O pins when read
I
Active LOW SMBus Alert (SMBALERT) output pin allows to initiate SMBus ‘Alert
Response Address’ sequence. Own slave address sent when sequence initiated.
I
Active LOW Reset (RESET) input pin resets device to power-up default state
I
GPIO All Call address allows programming of more than one device at the same time
with the same parameters
I
64 programmable slave addresses using 3 address pins
I
Readable Device ID (manufacturer, device type and revision)
I
Designed for live insertion in PICMG applications
N
Minimize line disturbance (I
OFF
and power-up 3-state)
N
Signal transient rejection (50 ns noise filter and robust I
2
C-bus state machine)
I
Low standby current
I
40
°
C to +85
°
C operation
I
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
I
Packages offered: TSSOP56, and HVQFN56
3.
Applications
I
Servers
I
RAID systems
I
Industrial control
I
Medical equipment
I
PLCs
I
Cell phones
I
Gaming machines
I
Instrumentation and test measurement
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