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| 型號(hào)： | PCA9698 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT |
| 中文描述： | 40位調(diào)頻I2C總線先進(jìn)的I / O復(fù)位，光電和INT端口 |
| 文件頁(yè)數(shù)： | 28/47頁(yè) |
| 文件大?。?/td> | 214K |
| 代理商： | PCA9698 |
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PCA9698_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 19 July 2006
28 of 47
Philips Semiconductors
PCA9698
40-bit Fm+ I
2
C-bus advanced I/O port with RESET, OE and INT
The programming becomes effective at the Acknowledge.
If more than 1 byte is written, previous data is overwritten.
Fig 18. Write to the output structure configuration, all bank control, or mode selection
002aab947
S A6 A5 A4 A3 A2 A1 A0 0 A
slave address
R/W
START condition
command register
AI = 'don't care'
A
acknowledge
from slave
DATA
A
acknowledge
from slave
acknowledge
from slave
P
STOP condition
SDA
X
0
1
0
1
0 D1 D0
00 for output structure configuration programming
01 for all bank control register programming
10 for mode selection register programming
If AI = 0, the same register is read during the whole sequence.
If AI = 1, the register value is incremented after each read. When the last register bank is read, it rolls over to the first byte
of the category (see category definition in
Section 7.3 “Command register”
).
The INT signal is released only when the last register containing an input that changed has been read. For example, when
IO2_4 and IO4_7 change at the same time and an Input Port register read sequence is initiated, starting with IP0, INT is
released after IP4 is read (and not after IP2 is read).
Fig 19. Read from Input Port, Output Port, I/O Configuration, Polarity Inversion, or Mask interrupt registers
002aab948
S A6 A5 A4 A3 A2 A1 A0 0 A
slave address
R/W
START condition
command register
AI = 1
A
acknowledge
from slave
A
no acknowledge
from master
acknowledge
from slave
P
STOP condition
SDA
1
0 D5 D4 D3 D2 D1 D0
Sr
repeated START
condition
A6 A5 A4 A3 A2 A1 A0
slave address
1 A
R/W
acknowledge
from slave
data from register
DATA
A
acknowledge
from master
first byte
register determined
by D4 D3 D2 D1 D0
data from register
DATA
second byte
data from register
DATA
last byte
D[5:0] = 00 1000 for Output Port register bank 0
D[5:0] = 01 0000 for Polarity Inversion register bank 0
D[5:0] = 01 1000 for Configuration register bank 0
D[5:0] = 10 0000 for Mask Interrupt register bank 0
D[5:0] = 00 0000 for Input Port register bank 0
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| PCA9698BS | 制造商:NXP Semiconductors 功能描述:IC IO EXPANDER 40BIT I2C 5 制造商:NXP Semiconductors 功能描述:IC, IO EXPANDER, 40BIT, I2C, 56HVQFN 制造商:NXP Semiconductors 功能描述:IC, IO EXPANDER, 40BIT, I2C, 56HVQFN; Chip Configuration:40bit; Bus Frequency:1MHz; Interface Type:I2C, SMBus; Supply Voltage Min:2.3V; Supply Voltage Max:5.5V; Digital IC Case Style:HVQFN; No. of Pins:56; No. of I/O's:40; MSL:MSL 1 ;RoHS Compliant: Yes |
| PCA9698BS,118 | 功能描述:接口-I/O擴(kuò)展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698BS,118-CUT TAPE | 制造商:NXP 功能描述:PCA9698 Series 40-Bit Fm I2C-Bus Advanced I/O Port w/ Reset - HVQFN 56 |
| PCA9698DGG | 功能描述:接口-I/O擴(kuò)展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698DGG,512 | 功能描述:接口-I/O擴(kuò)展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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