參數(shù)資料
型號: PCA9698BS,118
廠商: NXP Semiconductors
文件頁數(shù): 40/48頁
文件大小: 0K
描述: IC I/O EXPANDER I2C 40B 56HVQFN
產(chǎn)品培訓模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標準包裝: 1
接口: I²C
輸入/輸出數(shù): 40
中斷輸出:
頻率 - 時鐘: 1MHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤
供應商設備封裝: 56-HVQFN
包裝: 標準包裝
包括: POR
產(chǎn)品目錄頁面: 826 (CN2011-ZH PDF)
其它名稱: 568-3240-6
45
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
Figure 10-1. Reset Logic
10.3
Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in “System and Reset Characteristics” on page 308. The POR is activated whenever
V
CC is below the detection level. The POR circuit can be used to trigger the start-up Reset, as
well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
CC rise. The RESET signal is activated again, without any delay,
when V
CC decreases below the detection level.
MCU Status
Register (MCUSR)
Brown-out
Reset Circuit
BODLEVEL [2..0]
Delay Counters
CKSEL[3:0]
CK
TIMEOUT
WDRF
BORF
EXTRF
PORF
DATA BUS
Clock
Generator
SPIKE
FILTER
Pull-up Resistor
Watchdog
Oscillator
SUT[1:0]
Power-on Reset
Circuit
RSTDISBL
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