參數(shù)資料
型號: PCF51AC128ACFUE
廠商: Freescale Semiconductor
文件頁數(shù): 42/42頁
文件大小: 0K
描述: MCU 8BIT 128K FLASH 64-QFP
標準包裝: 84
系列: MCF51AC
核心處理器: Coldfire V1
芯體尺寸: 32-位
速度: 50MHz
連通性: CAN,I²C,SCI,SPI
外圍設(shè)備: LVD,PWM,WDT
輸入/輸出數(shù): 54
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 20x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-QFP
包裝: 托盤
MCF51AC256 Family Configurations
MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.7
Freescale Semiconductor
9
Inter-integrated circuit (IIC)
— Compatible with IIC bus standard
— Multi-master operation
— Software programmable for one of 64 different serial clock frequencies
— Interrupt driven byte-by-byte data transfer
— Arbitration lost interrupt with automatic mode switching from master to slave
— Calling address identification interrupt
— Bus busy detection
— 10-bit address extension
Controller area network (CAN)
— Implementation of the CAN protocol — Version 2.0A/B
– Standard and extended data frames
– Zero to eight bytes data length
– Programmable bit rate up to 1 Mbps
– Support for remote frames
— Five receive buffers with FIFO storage scheme
— Three transmit buffers with internal prioritization using a “l(fā)ocal priority” concept
— Flexible maskable identifier filter supports two full-size (32-bit) extended identifier filters, four
16-bit filters, or eight 8-bit filters
— Programmable wakeup functionality with integrated low-pass filter
— Programmable loopback mode supports self-test operation
— Programmable listen-only mode for monitoring of CAN bus
— Programmable bus-off recovery functionality
— Separate signalling and interrupt capabilities for all CAN receiver and transmitter error states
(warning, error passive, bus-off)
— Internal timer for time-stamping of received and transmitted messages
Serial communications interfaces (SCI)
— Full-duplex, standard non-return-to-zero (NRZ) format
— Double-buffered transmitter and receiver with separate enables
— Programmable baud rates (13-bit modulo divider)
— Interrupt-driven or polled operation
— Hardware parity generation and checking
— Programmable 8-bit or 9-bit character length
— Receiver wakeup by idle-line or address-mark
— Optional 13-bit break character generation / 11-bit break character detection
— Selectable transmitter output polarity
Serial peripheral interfaces (SPI)
— Master or slave mode operation
— Full-duplex or single-wire bidirectional option
— Programmable transmit bit rate
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