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參數資料
| 型號： | PCF8578T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | LCD驅動器 |
| 英文描述： | LCD row-column driver for dot matrix graphic displays |
| 封裝： | PCF8578HT/1<SOT357-1 (TQFP64)|<<http://www.nxp.com/packages/SOT357-1.html<1<Always Pb-free,;PCF8578T/1<SOT190-1 (VSO56)|<<http://www.nxp.com/packages/SOT190-1.html<1&l |
| 文件頁數： | 14/46頁 |
| 文件大小： | 274K |
| 代理商： | PCF8578T |
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PCF8578_6
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 5 May 2009
21 of 46
NXP Semiconductors
PCF8578
LCD row/column driver for dot matrix graphic displays
master receiver must signal an end of data to the slave transmitter, by not generating an
acknowledge on the last byte clocked out of the slave. The slave transmitter then leaves
the data line HIGH, enabling the master to generate a STOP condition (P).
Display bytes are written into, or read from the RAM at the address specied by the data
pointer and subaddress counter. Both the data pointer and subaddress counter are
automatically incremented, enabling a stream of data to be transferred either to, or from
the intended devices.
In multiple device applications, the hardware subaddress pins of the PCF8579s (A0 to A3)
are connected to VSS or VDD to represent the desired hardware subaddress code. If two or
more devices share the same slave address, then each device must be allocated to a
unique hardware subaddress.
8.9 Display RAM
The PCF8578 contains a 32
× 40-bit static RAM which stores the display data. The RAM
is divided into 4 banks of 40 bytes (4
× 8 × 40 bits). During RAM access, data is
transferred to and from the RAM via the I2C-bus. The rst eight columns of data (0 to 7)
cannot be displayed but are available for general data storage and provide compatibility
with the PCF8579. There is a direct correspondence between X-address and column
output number.
8.9.1 Data pointer
The addressing mechanism for the display RAM is realized using the data pointer. This
allows an individual data byte or a series of data bytes to be written into, or read from, the
display RAM, controlled by commands sent on the I2C-bus.
8.9.2 Subaddress counter
The storage and retrieval of display data is dependent on the content of the subaddress
counter. Storage takes place only when the contents of the subaddress counter match
with the hardware subaddress. The hardware subaddress of the PCF8578, valid in mixed
mode only, is xed at 0000.
8.10 Command decoder
The command decoder identies command bytes that arrive on the I2C-bus.
The ve commands available to the PCF8578 are dened in Table 9.
The most-signicant bit of a command is the continuation bit C (see Table 10 and
Figure 16). Commands are transferred in WRITE mode only.
Table 9.
Denition of PCF8578 commands
Command
Operation code
Reference
Bit
7
6
5
4
3
2
1
0
set-mode
C
1
0
T
E[1:0]
M[1:0]
set-start-bank
C
11111
B[1:0]
device-select
C
1
0
A[3:0]
RAM-access
C
1
G[1:0]
Y[1:0]
load-X-address
C
0
X[5:0]
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| PCI-36RS-SB-L | STRAIGHT TELECOM AND DATACOM CONNECTOR |
| PCI-36SS-SB-N | STRAIGHT TELECOM AND DATACOM CONNECTOR |
| PCI-36SS-B-H | STRAIGHT TELECOM AND DATACOM CONNECTOR |
| PCI-50R-B-LT | RIGHT ANGLE TELECOM AND DATACOM CONNECTOR |
| PCI-50S-B-UT | RIGHT ANGLE TELECOM AND DATACOM CONNECTOR |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PCF8578T/1 | 制造商:NXP Semiconductors 功能描述:IC LCD DRIVER ROW/COLUMN 56VSOP 制造商:NXP Semiconductors 功能描述:IC, LCD DRIVER, ROW/COLUMN, 56VSOP |
| PCF8578T/1,112 | 功能描述:LCD 驅動器 LCD DRVR DOT MATRIX RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| PCF8578T/1,118 | 功能描述:LCD 驅動器 DOT MATRIX LCD DRIVER (R/COLM) RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| PCF8578T/1112 | 制造商:NXP Semiconductors 功能描述:IC LCD DRVR 6V VSOP-56 |
| PCF8578TD | 功能描述:LCD 驅動器 LCD DRVR DOT MATRIX RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
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