參數(shù)資料
型號(hào): PCF8578T
廠商: NXP Semiconductors N.V.
元件分類: LCD驅(qū)動(dòng)器
英文描述: LCD row-column driver for dot matrix graphic displays
封裝: PCF8578HT/1<SOT357-1 (TQFP64)|<<http://www.nxp.com/packages/SOT357-1.html<1<Always Pb-free,;PCF8578T/1<SOT190-1 (VSO56)|<<http://www.nxp.com/packages/SOT190-1.html<1&l
文件頁數(shù): 17/46頁
文件大?。?/td> 274K
代理商: PCF8578T
PCF8578_6
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 5 May 2009
24 of 46
NXP Semiconductors
PCF8578
LCD row/column driver for dot matrix graphic displays
[1]
Values shown in decimal.
8.11 RAM access
RAM operations are only possible when the PCF8578 is in mixed mode. In this event its
hardware subaddress is internally xed at 0000 and the hardware subaddresses of any
PCF8579 used in conjunction with the PCF8578 must start at 0001.
There are three RAM-access modes:
Character
Half-graphic
Full-graphic
These modes are specied by the bits G[1:0] of the RAM-access command. The
RAM-access command controls the order in which data is written to or read from the RAM
To store RAM data, the user species the location into which the rst byte will be loaded
Device subaddress (specied by the device-select command)
RAM X-address (specied by the bits X[5:0] of the load-X-address command)
RAM bank (specied by the bits Y[1:0] of the RAM-access command)
Subsequent data bytes will be written or read according to the chosen RAM-access mode.
Device subaddresses are automatically incremented between devices until the last device
is reached. If the last device has subaddress 15, further display data transfers will lead to
a wrap-around of the subaddress to 0.
Table 15.
Load-X-address - command bit description
Bit
Symbol
Value
Description
7
C
0, 1
6
-
0
xed value
5 to 0
X[5:0]
0 to 39[1]
RAM column address;
six bits of immediate data, transferred to the
X-address pointer to dene one of forty display
RAM columns (see Figure 17)
Fig 17. RAM addressing scheme
001aaj920
LSB
1 byte
0
X address
X max
0
Y max
Y address
MSB
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