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參數(shù)資料
| 型號(hào)： | PCK2010R |
| 廠(chǎng)商： | NXP Semiconductors N.V. |
| 英文描述： | CK98R (100/133MHz) RCC Spread Spectrum System Clock Generator(CK98 (100/133MHz)RCC 擴(kuò)散光譜系統(tǒng)時(shí)鐘發(fā)生器) |
| 中文描述： | CK98R（100/133MHz）碾壓混凝土擴(kuò)頻系統(tǒng)時(shí)鐘發(fā)生器（CK98（100/133MHz）碾壓混凝土擴(kuò)散光譜系統(tǒng)時(shí)鐘發(fā)生器） |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大?。?/td> | 101K |
| 代理商： | PCK2010R |
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Philips Semiconductors
Product specification
PCK2010R
CK98R (100/133MHz) RCC spread spectrum
system clock generator
2000 May 17
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
2,3
REF [0–1]
3.3 V 14.318 MHz clock output
5
XTAL_IN
14.318 MHz crystal input
6
XTAL_OUT
14.318 MHz crystal output
8
PCICLK_F
3.3 V free running PCI clock
9, 11, 12, 14, 15, 17, 18
PCICLK [1–7]
3.3 V PCI clock outputs
21, 22, 25, 26
3V66 [0–3]
3.3 V fixed 66 MHz clock outputs
28
SEL133/100
Select input pin for enabling 133 MHz or 100 MHz CPU outputs.
H = 133 MHz, L = 100 MHz
3.3 V fixed 48 MHZ clock output
30
48 MHz USB
32, 33
SEL [0–1]
Logic select pins. TTL levels.
34
SPREAD
3.3 V LVTTL input. Enables spread spectrum mode when held LOW.
35
PWRDWN
3.3 V LVTTL input. Device enters powerdown mode when held LOW.
36
CPUSTOP
3.3 V LVTTL input. Stops all CPU clocks and 3V66 clocks when held LOW. CPUDIV_2
output remains on all the time.
3.3 V LVTTL input. Stops all PCI clocks except PCICLK_F when held LOW.
37
PCISTOP
41, 42, 45, 46
CPUCLK [0–3]
2.5 V CPU output. 133 MHz or 100MHz depending on state of input pin SEL133/100.
49, 50
CPUDIV_2 [0–1]
2.5 V output running at 1/2 CPU clock frequency. 66 MHz or 50 MHz depending on
state of input pin SEL133/100.
2.5 V clock outputs running divide synchronous with the CPU clock frequency. Fixed
16.67 MHz limit.
3.3 V power supply.
53, 54, 55
IOAPIC [0–2]
4, 10, 16, 23, 27, 31, 39
V
DD3V
1, 7, 13, 19, 20, 24, 29,
38, 40, 44, 48, 52
43, 47, 51, 56
NOTE:
1. V
DD3V
, V
DD25V
and V
SS
in the above tables reflects a likely internal POWER and GROUND partition to reduce the effects of internal noise
on the performance of the device. In reality, the platform will be configured with the V
DD25V
pins tied to a 2.5 V supply, all remaining V
DD
pins
tied to a common 3.3 V supply and all V
SS
pins being common.
V
SS
Ground
V
DD25V
2.5 V power supply
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| PCK2010DL | CK98 100/133MHz Spread Spectrum System Clock Generator |
| PCK2010RA | CK98R 100/133MHz RCC spread spectrum system clock generator |
| PCK2011 | Direct RAMbus Clock Generator(定向RAM總線(xiàn)時(shí)鐘發(fā)生器) |
| PCK2011DL | Direct RAMbus Clock Generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCK2010RA | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:CK98R 100/133MHz RCC spread spectrum system clock generator |
| PCK2010RADL | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:CK98R 100/133MHz RCC spread spectrum system clock generator |
| PCK2010RADL,112 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 CK98R(100/133MHZ)RCC/CLK GEN RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| PCK2010RADL,118 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 CK98R(100/133MHZ)RCC/CLK GEN RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| PCK2010RDL | 制造商:PHILIPS-SEMI 功能描述: |
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