參數(shù)資料
型號(hào): PCM3794A
元件分類(lèi): Codec
英文描述: 16-Bit, Low-Power Stereo Audio CODEC With Microphone Bias, Headphone, and Digital Speaker Amplifier
中文描述: 16位,低功耗立體聲音頻編解碼器麥克風(fēng)偏置,耳機(jī),揚(yáng)聲器放大器和數(shù)字
文件頁(yè)數(shù): 27/68頁(yè)
文件大?。?/td> 982K
代理商: PCM3794A
www.ti.com
THREE-WIRE INTERFACE (SPI, MODE (PIN 28) = LOW)
All write operations for the serial control port use 16-bit data words.
Figure 30
shows the control data word
format. The most-significant bit must be 0. There are seven bits, labeled IDX[6:0], that set the register address
for the write operation. The least-significant eight bits, D[7:0], contain the data to be written to the register
specified by IDX[6:0].
MSB
0
IDX6
IDX5
IDX4
IDX3
IDX2
IDX1
IDX0
D7
D6
D5
D4
D3
D2
D1
D0
LSB
Register Index (or Address)
Register Data
R0001-01
MC
MS
MD
16 Bits
(1) Single Write Operation
MSB
LSB
MSB
(2) Continuous Write Operation
MSB
8 Bits x N Frames
MC
MS
MD
N Frames
LSB MSB
LSB MSB
LSB
MSB
LSB
Register Index
8 Bits
Register (N) Data
Register (N+1) Data
Register (N+2) Data
T0012-03
PCM3793A
PCM3794A
SLAS529A–JANUARY 2007–REVISED FEBRUARY 2007
Figure 31
shows the functional timing diagram for writing to the serial control port. To write the data into the
mode register, the data is clocked into an internal shift register on the rising edge of the MC clock. The serial
data should change on the falling edge of the MC clock, and MS should be LOW during write mode. The rising
edge of MS should be aligned with the falling edge of the last MC clock pulse in the 16-bit frame. MC can run
continuously between transactions while MS is in the LOW state.
Figure 30. Control Data Word Format for MD
Figure 31. Register Write Operation
27
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