參數(shù)資料
型號(hào): PCM4222_07
英文描述: High-Performance, Two-Channel, 24-Bit, 216kHz Sampling Multi-Bit Delta-Sigma Analog-to-Digital Converter
中文描述: 高性能,雙通道,24位,216kHz的采樣多位Δ-Σ模擬到數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 6/40頁(yè)
文件大?。?/td> 609K
代理商: PCM4222_07
www.ti.com
ELECTRICAL CHARACTERISTICS: AUDIO INTERFACE TIMING
All specifications are at T
A
= +25
°
C, VCC1 = VCC2 = +4.0V, and VDD = +3.3V, unless otherwise noted.
PCM4222
SBAS399A–OCTOBER 2006–REVISED MARCH 2007
PCM4222
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AUDIO SERIAL PORT (PCM OUTPUT)
LRCK period, t
LRCKP
LRCK high/low time, t
LRCKHL
All data formats
4.62
125
μ
s
μ
s
0.45
×
t
LRCKP
0.55
×
t
LRCKP
Left-Justified and I
2
S data formats
LRCK high/low time, t
LRCKHL
BCK period, t
BCKP
TDM data formats
0.45
×
t
LRCKP
0.55
×
t
LRCKP
μ
s
Left-Justified and I
2
S data formats
Normal sampling
t
LRCKP
/128
t
LRCKP
/64
t
LRCKP
/64
ns
Double Speed sampling
ns
Quad Speed sampling
ns
BCK period, t
BCKP
TDM data formats
Normal sampling
t
LRCKP
/256
t
LRCKP
/128
t
LRCKP
/64
0.45
×
t
BCKP
ns
Double Speed sampling
ns
Quad Speed sampling
ns
BCK high/low time, t
BCKHL
Data output delay, t
DO
DSD OUTPUT
All data formats
0.55
×
t
BCKP
10
ns
All data formats
ns
DSDCLK period, t
DSDCLKP
64x output rate
289
1954
ns
128x output rate
144.5
977
ns
DSDCLK high/low time, t
DSDCLKHL
Data output delay, t
DSDO
MULTI-BIT MODULATOR OUTPUT
0.45
×
t
DSDCLKP
0.55
×
t
DSDCLKP
10
ns
ns
MCKI period, t
MCKIP
MCKI high/low time, t
MCKIHL
WCKO period, t
WCKOP
WCKO high/low time, t
WCKOHL
Data output delay, t
MODO
72.3
488.3
ns
0.45
×
t
MCKIP
144.5
0.55
×
t
MCKIP
977
ns
ns
0.45
×
t
WCKOP
0.55
×
t
WCKOP
15
ns
ns
6
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PCM4222PFBG4 High-Performance, Two-Channel, 24-Bit, 216kHz Sampling Multi-Bit Delta-Sigma Analog-to-Digital Converter
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