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參數(shù)資料
| 型號(hào)： | PDSP1601ABOAC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 位片處理器 |
| 英文描述： | ALU and Barrel Shifter |
| 中文描述： | 16-BIT, BIT-SLICE MICROPROCESSOR, CPGA84 |
| 封裝： | PGA-84 |
| 文件頁(yè)數(shù)： | 13/16頁(yè) |
| 文件大?。?/td> | 128K |
| 代理商： | PDSP1601ABOAC |
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PDSP1601/PDSP1601A
13
Barrel Shifter or ALU Register Instructions
Function
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the contents of the Right register will appear on the output. On the rising edge
of CLK at the end of the cycle, and the data on the register inputs will be loaded into the
Left Register.
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the contents of the Left register will appear on the output. On the rising edge
of CLK at the end of the cycle, the data on the register inputs will be loaded into the Right
Register.
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the contents of the Left register will appear on the output. On the rising edge
of CLK at the end of the cycle, the data on the register inputs will be loaded into the Left
Register.
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the contents of the Right register will appear on the output. On the rising edge
of CLK at the end of the cycle, the data on the register inputs will be loaded into the Right
Register.
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the contents of the Left register will appear on the output. On the rising edge
of CLK at the end of the cycle, and the data on the register inputs will be loaded into both
Left and Right Register.
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the contents of the Right register will appear on the output. On the rising edge
of CLK at the end of the cycle no load operation will occur, the register contents will remain
unchanged.
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the contents of the Left register will appear on the output. On the rising edge
of CLK at the end of the cycle no load operation will occur, the register contents will remain
unchanged.
After the rising edge of CLK at the beginning of the cycle in which this instruction is
executed, the input to the registers will appear on the output. On the rising edge
of CLK at the end of the cycle no load operation will occur, the register contents will remain
unchanged.
Op Code
<0>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
Mnemonic
LLRRR
LRRLR
LLRLR
LRRRR
LBRLR
NOPRR
NOPLR
NOPPS
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PDSP1601AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| PDSP1601AC0/AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
| PDSP1601ALC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| PDSP1601B0/AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
| PDSP1601B0/LC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
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