參數(shù)資料
型號: PDSP16116MCGC1R
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理外設
英文描述: 16 by 16 Bit Complex Multiplier
中文描述: 16-BIT, DSP-MULTIPLIER, CQFP144
封裝: CERAMIC, QFP-144
文件頁數(shù): 12/18頁
文件大小: 157K
代理商: PDSP16116MCGC1R
PDSP16116/A/MC
12
At the end of each constituent pass of the FFT, the
positions of the binary point supported may change to reflect
the trend of data increase or decreases in magnitude. Hence,
in the pass following that of the above example, the four
positions of binary point supported may be change to:
XX.XXXXXXXXXXXX
XXX.XXXXXXXXXXX
XXXX.XXXXXXXXXX
XXXXX.XXXXXXXXX
word tag = 00
word tag = 01
word tag = 10
word tag = 11
This variation in the range of binary points supported from
pass to pass (i.e. the movement of the binary point relative to
its position in the original data) is recorded in the GWR.
Thus we can determine the position of the binary point
relative to its initial position by modifying the value of GWR by
WTOUT for a given word as shown in Table 6.
As an example, if GWR=01001 and WTOUT=10 then the
binary point has moved 10 places to the right of its original
position.
Figure 5 - FFT Butterfly Processor
SOBFP
PDSP1601/A
PDSP16116/A
A
C
A
C
XR
PR
XI
YR
YI
PI
A
B
C
D
B
A
C
D
BR
BI
WR
WI
EOPSS
AR
AR15:13
WTA WTB
AI15:13
AI
SFTA
SFTA
DAR
DAI
SFTR
SFTR
A'R
A'I
B'R
B'I
WTOUT
GWR
PDSP16318/A
PDSP16318/A
PDSP1601/A
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