
PEB 80900
Part I
’
NTC-T
’
: Functional Description
Data Sheet
59
2001-04-02
The S-bus receiver is designed as a threshold detector with adaptively switched
threshold levels. The S-bus receiver is symmetrical, which allows for a simple external
circuitry and printed circuit board layout to meet the I.430 receiver input impedance
specification.
The full-bauded pseudo-ternary pulse shaping is achieved with the integrated transmitter
which is realized as two current limited voltage sources. A voltage of 2.1 V is delivered
between SX1-SX2, which yields a current of 7.5 mA over 280
.
S/T-Interface Circuitry
In order to comply to the physical requirements of ITU recommendation I.430 and
considering the national requirements concerning overvoltage protection and
electromagnetic compatibility (EMC), the S-transceiver needs some additional circuitry.
The
transmitter
requires external resistors (20
…
40
) in order to adjust the output
voltage to the pulse mask (nominal 750 mV according to ITU I.430, to be tested with the
test mode
“
TM1
”
) on the one hand and in order to meet the output impedance of
minimum 20
on the other hand.
Figure 28
S-Interface Transmitter External Circuitry
The
receiver
of the S-transceiver is symmetrical. 10 k
overall resistance are
recommended in each receive path. Although it is possible to place two single 10 k
resistors, either between transformer and diode circuit or between chip and diode circuit,
it is preferable to split the resistance into two resistors for each line. This allows to place
a high resistance between the transformer and the diode protection circuit (required to
ITS09711
GND
Overvoltage
Protection
S-Interface
Connector
SX1
SX2
20...40
DC Point
20...40
2 : 1
DD
V
47 pF
47 pF
1)
1)
optional, as close to the pins as possible
1)