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參數(shù)資料
| 型號： | PEDL9352-01 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 128-Channel Organic EL Driver with Built-in RAM |
| 中文描述： | 128通道有機(jī)EL帶內(nèi)置驅(qū)動器在RAM |
| 文件頁數(shù)： | 17/53頁 |
| 文件大小： | 302K |
| 代理商： | PEDL9352-01 |
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PEDL9352-01
OKI Semiconductor
ML9352
24/53
COMMANDS
MPU Interface
MPU
Read mode
Write mode
80-Series
Pin
RD = “L”
Pin
WR = “L”
68-Series
Pin R/
W = “H”
Pin E = “H”
Pin R/
W = “L”
Pin E = “H”
In the case of the 80-series MPU interface, a command is started by inputting a Low pulse on the
RD pin or the WR
pin.
In the case of the 68-series MPU interface, a command is started by inputting a High pulse on the E pin.
Description of commands
Display ON/OFF (Write)
This is the command for controlling the turning on or off the organic EL panel. The organic EL display is turned
on when a “1” is written in bit D0 and is turned off when a “0” is written in this bit. While the organic EL panel is
turned off, the anode and cathode drivers output the VSS level.
A0
D7
D6
D5
D4
D3
D2
D1
D0
Display ON
0
1
0
1
0
1
Display OFF
0
1
0
1
0
1
0
Display line number (2-byte command)
This command specifies the number of lines to be displayed on the organic EL panel. This command is used
together with a pair of the display line number set mode command and the display line number register set
command. Be sure to use these two paired commands sequentially.
Display line number set mode (Write)
The display line number register set command is enabled by inputting this command. When the display line
number set mode is set, commands other than the display line number register set command cannot be used. This
status is released when display line number data is set to the register with the display line number register set
command.
No. of display lines
A0
D7
D6
D5
D4
D3
D2
D1
D0
32 lines
0
1
0
1
0
*
Determined by display
line register data
0
1
0
1
*
Note: When the number of display lines is set to 32 (D3 = 0), the display line number register set
command is disabled.
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