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參數(shù)資料
| 型號： | PEEL22LV10AZP-35 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Programmable Electrically Erasable Logic Device |
| 中文描述： | 的CMOS電可擦除可編程邏輯器件 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 146K |
| 代理商： | PEEL22LV10AZP-35 |
8
04-02-037D
PEEL
TM
22LV10AZ
Table 6 - A.C. Electrical Characteristics
(Over the operating range
9
)
-25
I-35
3V
±
10% 3.3V
±
10% 3V
±
10% 3.3V
±
10%
Min Max Min Max Min Max Min Max
Symbol
Parameter
Units
t
PD
Input
6
to non-registered output in continuous
mode
13
Input
6
to output enable
7
Input
6
to output disable
7
Clock to output
Clock to comb. Output delay via internal
registered feedback
Clock to Feedback
Input
6
or feedback setup to clock
Input
6
hold after clock
t
CL
, t
CH
Clock low time, clock high time
9
t
CP
Min clock period Ext (t
SC
+ t
CO1
)
f
MAX1
Internal feedback 1/ (t
SC
+ t
CF
)
12
f
MAX2
External Feedback (1/ t
CP
)
12
f
MAX3
No Feedback 1/ (t
CL
+ t
CH
)
12
t
AW
Asynchronous Reset Pulse Width
t
AP
Input to Asynchronous Reset
t
AR
Asynchronous Reset recovery time
t
RESET
Power-on reset time for registers in clear state
14
30
25
40
35
ns
t
OE
t
OD
t
CO1
30
30
20
25
25
15
40
40
28
35
35
25
ns
ns
ns
t
CO2
40
35
56
49
ns
t
CF
t
SC
t
HC
14
30
30
5
9
25
25
5
20
40
40
5
13
35
35
5
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
μ
s
20
0
20
40
29.4
25
25
30
15
0
13
30
41.6
33.3
38.4
25
28
0
28
56
20.8
17.9
17.9
40
21
0
18
39
29.4
25.6
27.7
35
Inputs I/O,
Registered Feedback,
Synchronous Preset
Clock
Asynchronous
Reset
Registered
Outputs
Combinatorial
Outputs
Figure 7 - Switching Waveforms
Notes:
1.
Minimum DC input is -0.5V, however, inputs may undershoot to -
2.0V for periods less than 20 ns.
V
and V
are not specified for program/verify operation.
The Supply Voltage range of 2.7 to 3.6V was chosen to allow
this part to be used in both 3V 10% and 3.3V 10% applications.
Test Points for Clock and V
CC
in t
R
and t
F
are referenced at the
10% and 90% levels.
I/O pins are 0V and V
.
"Input" refers to an input pin signal.
t
is measured from input transition to V
0.1V, TOD is
measured from input transition to V
OH
-0.1V or V
OL
+0.1V; V
REF
=V
Capacitances are tested on a sample basis.
2.
3.
4.
5.
6.
7.
8.
9.
Test conditions assume: signal transition times of 3ns or less
from the 10% and 90% points, timing reference levels of 1.5V
(Unless otherwise specified).
10. Test one output at a time for duration of less than 1 second.
11. ICC for a typical application: This parameter is tested with the
device programmed as a 10-bit Counter.
12. Parameters are not 100% tested. Specifications are based on
initial characterization and are tested after any design process
modification that might affect operational frequency.
13. t
, t
, t
, t
, t
, and t
are approximately 5 ns, slower on the
first transaction from sleep mode.
14. All inputs at GND.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PEEL22LV10AZPI-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Programmable Electrically Erasable Logic Device |
| PEEL22LV10AZPI-35 | 功能描述:SPLD - 簡單可編程邏輯器件 12 INP 10 I/O 35ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| PEEL22LV10AZPI-35L | 功能描述:SPLD - 簡單可編程邏輯器件 12 Input 10 I/O 35ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| PEEL22LV10AZS-25 | 功能描述:SPLD - 簡單可編程邏輯器件 12 INP 10 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| PEEL22LV10AZS-25L | 功能描述:SPLD - 簡單可編程邏輯器件 12 Input 10 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
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