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參數(shù)資料
| 型號(hào)： | PEELTM16CV8J-25 |
| 英文描述： | ASIC |
| 中文描述： | 專用集成電路 |
| 文件頁數(shù)： | 9/10頁 |
| 文件大小： | 173K |
| 代理商： | PEELTM16CV8J-25 |
9
04-02-004I
PEEL
TM
16CV8
Inputs, I/O,
Registered Feedback,
Synchronous Preset
Clock
Asynchronous
Reset
Registered
Outputs
Combinatorial
Outputs
Symbol
Parameter
-25
Unit
Min
Max
25
t
PD
t
OE
t
OD
t
CO1
t
CO2
Input
5
to non-registered output
ns
Input
5
to output enable
6
25
ns
Input
5
to output disable
6
Clock to Output
25
ns
15
ns
Clock to comb. output delay
via internal registered feedback
Clock to Feedback
35
ns
t
CF
t
SC
10
ns
ns
Input
5
or feedback setup to clock
20
t
HC
Input
5
hold after clock
0
ns
t
CL
, t
CH
Clock low time, clock high time
8
Min clock period Ext (t
SC
+ t
CO1
)
15
ns
t
CP
f
MAX1
35
28.5
ns
MHz
Internal feedback (1/t
SC
+t
CF
)
11
f
MAX2
External Feedback (1/t
CP
)
11
28.5
MHz
f
MAX3
No Feedback (1/t
CL
+t
CH
)
11
Asynchronous Reset Pulse Width
33.3
MHz
t
AW
t
AP
25
ns
ns
Input
5
to Asynchronous Reset
Asynchronous Reset recovery time
Power-on reset time for registers
in clear state
25
t
AR
25
ns
t
RESET
5
μs
A. C. Electrical Characteristics
Over the Operating Range 8, 11
Switching Waveforms
8. Test conditions assume: signal transition times of 3ns or less fromthe 10% and 90%
points, timng reference levels of 1.5V (Unless otherwise specified).
9. Test one output at a time for a duration of less than 1 second.
10. I
CC
for a typical application: This parameter is tested with the device programmed as
an 8-bit Counter.
11. Parameters are not 100% tested. Specifications are based on initial characterization
and are tested after any design process modification that mght affect operational fre-
quency.
Notes:
1. MnimumDC input is -0.5V, however, inputs may undershoot to -2.0V for periods less
than 20 ns.
2. V
I
and V
O
are not specified for program/verify operation.
3. Test Points for Clock and VCC in t
R
and t
F
are referenced at the 10% and 90% levels.
4. I/O pins are 0V and V
CC
.
5. “Input” refers to an input pin signal.
6. t
OE
is measured frominput transition to V
REF
±0.1V, T
OD
is measured frominput transi-
tion to V
OH
-0.1V or V
OL
+0.1V; V
REF
=V
L.
7. Capacitances are tested on a sample basis.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEELTM16CV8P-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
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| PEELTM16CV8T-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
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| PEF | 制造商:Infineon Technologies AG 功能描述: |
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