參數(shù)資料
型號: PHN210T
英文描述: TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 27V V(BR)DSS | 3.4A I(D) | SO
中文描述: 晶體管| MOSFET | MATCHED PAIR | N-CHANNEL | 27V V(BR)DSS | 3.4A I(D) | SO封裝
文件頁數(shù): 2/7頁
文件大小: 84K
代理商: PHN210T
Philips Semiconductors
Product specification
Dual N-channel enhancement mode
TrenchMOS
TM
transistor
PHN210T
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-a
Thermal resistance junction
to ambient
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted, FR4 board, t
10 sec
TYP.
-
MAX.
62.5
UNIT
K/W
Surface mounted, FR4 board
150
-
K/W
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
E
AS
Non-repetitive avalanche
energy (per MOSFET)
CONDITIONS
Unclamped inductive load, I
= 3.4 A;
t
p
= 0.2 ms; T
j
prior to avalanche = 25C;
V
DD
15 V; R
GS
= 50
; V
GS
= 10 V
MIN.
-
MAX.
13
UNIT
mJ
I
AS
Non-repetitive avalanche
current (per MOSFET)
-
3.4
A
ELECTRICAL CHARACTERISTICS
T
j
= 25C, per MOSFET unless otherwise specified
SYMBOL PARAMETER
V
(BR)DSS
Drain-source breakdown
voltage
V
GS(TO)
Gate threshold voltage
CONDITIONS
V
GS
= 0 V; I
D
= 10
μ
A;
MIN.
30
27
1
0.4
-
-
-
-
2
3.5
2
-
-
-
-
-
-
-
-
-
-
-
-
TYP. MAX. UNIT
-
-
-
-
2
2.8
-
-
3.2
80
100
120
200
-
170
4.5
-
-
-
-
-
10
100
0.6
10
10
100
6
-
0.7
-
0.7
-
6
-
8
-
21
-
15
-
2.5
-
5
-
V
V
V
V
V
T
j
= -55C
V
DS
= V
GS
; I
D
= 1 mA
T
j
= 150C
T
j
= -55C
R
DS(ON)
Drain-source on-state
resistance
V
GS
= 10 V; I
D
= 2.2 A
V
GS
= 4.5 V; I
D
= 1 A
V
GS
= 10 V; I
D
= 2.2 A; T
j
= 150C
V
DS
= 20 V; I
D
= 2.2 A
V
GS
= 10 V; V
DS
= 1 V;
V
GS
= 4.5 V; V
DS
= 5 V
V
DS
= 24 V; V
GS
= 0 V;
V
DS
= 24 V; V
GS
= 0 V; T
j
= 150C
m
m
m
S
A
A
nA
μ
A
nA
nC
nC
nC
ns
ns
ns
ns
nH
nH
g
fs
I
D(ON)
Forward transconductance
On-state drain current
I
DSS
Zero gate voltage drain
current
Gate source leakage current V
GS
=
±
20 V; V
DS
= 0 V
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal source inductance
I
GSS
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
s
I
D
= 2.3 A; V
DD
= 15 V; V
GS
= 10 V
V
DD
= 20 V; R
D
= 18
;
V
= 10 V; R
G
= 6
Resistive load
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
V
GS
= 0 V; V
DS
= 20 V; f = 1 MHz
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
-
-
-
250
88
54
-
-
-
pF
pF
pF
March 1999
2
Rev 1.000
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