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參數(shù)資料
| 型號(hào)： | PHN405 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | 4 N-channel 60 mohm FET array enhancement mode MOS transistors |
| 中文描述： | 3700 mA, 30 V, 4 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MO-150AC |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 94K |
| 代理商： | PHN405 |
1998 Mar 17
3
Philips Semiconductors
Product specification
4 N-channel 60 m
FET array
enhancement mode MOS transistors
PHN405
QUICK REFERENCE DATA
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1.
2.
3.
4.
5.
T
s
is the temperature at the soldering point of the drain lead.
Pulse width and duty cycle limited by maximum junction temperature.
When only one FET dissipates.
When either FETs 1 and 3 or 2 and 4 dissipate an equal amount of power.
When all four FETs dissipate an equal amount of power.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
V
GS
V
GSth
I
D
R
DSon
P
tot
drain-source voltage (DC)
gate-source voltage (DC)
gate-source threshold voltage
drain current (DC)
drain-source on-state resistance
total power dissipation
1
30
±
20
2.8
3.7
60
1.4
V
V
V
A
m
W
I
D
= 1 mA; V
DS
= V
GS
T
s
= 80
°
C
I
D
= 2 A; V
GS
= 10 V
T
s
= 80
°
C
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per FET
V
DS
V
GS
I
D
I
DM
P
tot
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
peak drain current
total power dissipation
55
55
30
±
20
3.7
14.8
1.4
1.25
1.09
+150
+150
V
V
A
A
W
W
W
°
C
°
C
T
s
= 80
°
C; note 1
note 2
T
s
= 80
°
C; note 3
T
s
= 80
°
C; note 4
T
s
= 80
°
C; note 5
T
stg
T
j
storage temperature
operating junction temperature
Current monitor
I
M
I
MM
monitor current (DC)
peak monitor current
T
s
= 80
°
C
note 2
50
220
mA
mA
Source-drain diode
I
S
I
SM
source current (DC)
peak source current
T
s
= 80
°
C
note 2
1.4
5.6
A
A
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