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參數(shù)資料
| 型號(hào)： | PI6C184S |
| 英文描述： | THIRTEEN DISTRIBUTED-OUTPUT CLOCK DRIVER|CMOS|SOP|28PIN|PLASTIC |
| 中文描述： | 13個(gè)分布式輸出時(shí)鐘驅(qū)動(dòng)器|的CMOS |專科| 28腳|塑料 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 580K |
| 代理商： | PI6C184S |
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P8399-1 06/11/99
PI6C102-16
Spread Spectrum Clock Synthesizer
Storage Temperature ............................................................–65°C to +150°C
Ambient Temperature with Power Applied.............................. –0°C to +70°C
3.3V Supply Voltage to Ground Potential .............................. –0.5V to +4.6V
2.5V Supply Voltage to Ground Potential .............................. –0.5V to +3.6V
DC Input Voltage .................................................................... –0.5V to +4.6V
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics
(V
DD
= +3.3V ±5%, V
DD2
= +2.5V ± 5%, T
A
= 0°C to +70°C)
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
The PWR_DWN# is used to place the device in a very low power
state. PWR_DWN# is an asynchronous active low input. Internal
clocks are stopped after the device is put in power-down mode. The
power-on latency is less than 3ms. PCI_STOP# and CPU_STOP#
are “don’t cares” during the power-down operations. The REF
clock is stopped in the LOW state as soon as possible.
CPU_STOP# is an input signal used to turn off the CPU clocks for
low power operation. CPU_STOP# is asserted asynchronously by
the external clock control logic with the rising edge of free running
PCI clock and is internally synchronized to the external PCICLK_F
output. All other clocks continue to run while the CPU clocks are
disabled. The CPU clocks are always stopped in a LOW state and
started guaranteeing that the high pulse width is a full pulse. CPU
clock on latency is 2 or 3 CPU clocks and CPU clock off latency
is 2 or 3 CPU clocks.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI6C185-00 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Precision 1-7 Clock Buffer |
| PI6C185-00AL | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Precision 1-7 Clock Buffer |
| PI6C185-00AQ | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Precision 1-7 Clock Buffer |
| PI6C185-00L | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Precision 1-7 Clock Buffer |
| PI6C185-00Q | 制造商:Pericom Semiconductor Corporation 功能描述:Clock Fanout Buffer 7-OUT 20-Pin QSOP Tube |
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