參數(shù)資料
型號(hào): PIC10F322T-I/OT
廠商: Microchip Technology
文件頁數(shù): 171/210頁
文件大小: 0K
描述: MCU 8BIT 896B FLASH SOT23-6
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 1
系列: PIC® 10F
核心處理器: PIC
芯體尺寸: 8-位
速度: 16MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 3
程序存儲(chǔ)器容量: 896B(512 x 14)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: SOT-23-6
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: PIC10F322T-I/OTDKR
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2011 Microchip Technology Inc.
Preliminary
DS41585A-page 63
PIC10(L)F320/322
9.2.4
WRITING TO FLASH PROGRAM
MEMORY
Program memory is programmed using the following
steps:
1.
Load the address in PMADRH:PMADRL of the
row to be programmed.
2.
Load each write latch with data.
3.
Initiate a programming operation.
4.
Repeat steps 1 through 3 until all data is written.
Before writing to program memory, the word(s) to be
written must be erased or previously unwritten. Pro-
gram memory can only be erased one row at a time. No
automatic erase occurs upon the initiation of the write.
Program memory can be written one or more words at
a time. The maximum number of words written at one
time is equal to the number of write latches. See
Figure 9-5 (row writes to program memory with 16 write
latches) for more details.
The write latches are aligned to the Flash row address
boundary
defined
by
the
upper
10-bits
of
PMADRH:PMADRL, (PMADRH<6:0>:PMADRL<7:5>)
with the lower 5-bits of PMADRL, (PMADRL<4:0>)
determining the write latch being loaded. Write opera-
tions do not cross these boundaries. At the completion
of a program memory write operation, the data in the
write latches is reset to contain 0x3FFF.
The following steps should be completed to load the
write latches and program a row of program memory.
These steps are divided into two parts. First, each write
latch is loaded with data from the PMDATH:PMDATL
using the unlock sequence with LWLO = 1. When the
last word to be loaded into the write latch is ready, the
LWLO bit is cleared and the unlock sequence
executed. This initiates the programming operation,
writing all the latches into Flash program memory.
1.
Set the WREN bit of the PMCON1 register.
2.
Clear the CFGS bit of the PMCON1 register.
3.
Set the LWLO bit of the PMCON1 register.
When the LWLO bit of the PMCON1 register is
‘1’, the write sequence will only load the write
latches and will not initiate the write to Flash
program memory.
4.
Load the PMADRH:PMADRL register pair with
the address of the location to be written.
5.
Load the PMDATH:PMDATL register pair with
the program memory data to be written.
6.
Execute the unlock sequence (Section 9.2.2
). The write
latch is now loaded.
7.
Increment the PMADRH:PMADRL register pair
to point to the next location.
8.
Repeat steps 5 through 7 until all but the last
write latch has been loaded.
9.
Clear the LWLO bit of the PMCON1 register.
When the LWLO bit of the PMCON1 register is
‘0’, the write sequence will initiate the write to
Flash program memory.
10. Load the PMDATH:PMDATL register pair with
the program memory data to be written.
11.
Execute the unlock sequence (Section 9.2.2
). The
entire program memory latch content is now
written to Flash program memory.
An example of the complete write sequence is shown in
Example 9-3. The initial address is loaded into the
PMADRH:PMADRL register pair; the data is loaded
using indirect addressing.
Note:
The special unlock sequence is required
to load a write latch with data or initiate a
Flash programming operation. If the
unlock sequence is interrupted, writing to
the latches or program memory will not be
initiated.
Note:
The program memory write latches are
reset to the blank state (0x3FFF) at the
completion of every write or erase
operation. As a result, it is not necessary
to load all the program memory write
latches. Unloaded latches will remain in
the blank state.
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