參數(shù)資料
型號: PIC16C57-XTI/P
廠商: Microchip Technology
文件頁數(shù): 15/194頁
文件大?。?/td> 0K
描述: IC MCU OTP 2KX12 28DIP
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 15
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設備: POR,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 3KB(2K x 12)
程序存儲器類型: OTP
RAM 容量: 72 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 6.25 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.600",15.24mm)
包裝: 管件
配用: XLT28XP-ND - SOCKET TRANSITION ICE 28DIP
AC164001-ND - MODULE SKT PROMATEII 18/28DIP
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁
PIC18F2450/4450
2006 Microchip Technology Inc.
Advance Information
DS39760A-page 109
9.5
PORTE, TRISE and LATE
Registers
Depending on the particular PIC18F2450/4450 device
selected, PORTE is implemented in two different ways.
For 40/44-pin devices, PORTE is a 4-bit wide port.
Three pins (RE0/AN5, RE1/AN6 and RE2/AN7) are
individually configurable as inputs or outputs. These
pins have Schmitt Trigger input buffers. When selected
as an analog input, these pins will read as ‘0’s.
The corresponding data direction register is TRISE.
Setting a TRISE bit (= 1) will make the corresponding
PORTE pin an input (i.e., put the corresponding output
driver in a high-impedance mode). Clearing a TRISE bit
(= 0) will make the corresponding PORTE pin an output
(i.e., put the contents of the output latch on the selected
pin).
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
The Data Latch register (LATE) is also memory
mapped. Read-modify-write operations on the LATE
register read and write the latched output value for
PORTE.
The fourth pin of PORTE (MCLR/VPP/RE3) is an input
only pin. Its operation is controlled by the MCLRE Config-
uration bit. When selected as a port pin (MCLRE = 0), it
functions as a digital input only pin; as such, it does not
have TRIS or LAT bits associated with its operation.
Otherwise, it functions as the device’s Master Clear input.
In either configuration, RE3 also functions as the
programming voltage input during programming.
EXAMPLE 9-5:
INITIALIZING PORTE
9.5.1
PORTE IN 28-PIN DEVICES
For 28-pin devices, PORTE is only available when
Master Clear functionality is disabled (MCLRE = 0). In
these cases, PORTE is a single bit, input only port
comprised of RE3 only. The pin operates as previously
described.
Note:
On a Power-on Reset, RE2:RE0 are
configured as analog inputs.
Note:
On a Power-on Reset, RE3 is enabled as
a digital input only if Master Clear
functionality is disabled.
CLRF
PORTE
; Initialize PORTE by
; clearing output
; data latches
CLRF
LATE
; Alternate method
; to clear output
; data latches
MOVLW
0Ah
; Configure A/D
MOVWF
ADCON1
; for digital inputs
MOVLW
03h
; Value used to
; initialize data
; direction
MOVWF
TRISC
; Set RE<0> as inputs
; RE<1> as inputs
; RE<2> as outputs
REGISTER 9-1:
PORTE REGISTER
U-0
R/W-x
R/W-0
RE3(1,2)
RE2(3)
RE1(3)
RE0(3)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
Unimplemented: Read as ‘0’
bit 3-0
RE3:RE0: PORTE Data Input bits(1,2,3)
Note 1:
implemented only when Master Clear functionality is disabled (MCLRE Configuration bit = 0); otherwise,
read as ‘0’.
2:
RE3 is the only PORTE bit implemented on both 28-pin and 40/44-pin devices. All other bits are
implemented only when PORTE is implemented (i.e., 40/44-pin devices).
3:
Unimplemented in 28-pin devices; read as ‘0’.
相關PDF資料
PDF描述
ATMEGA88V-10PU IC AVR MCU 8K 10MHZ 1.8V 28DIP
DSPIC33FJ64GP206A-I/PT IC DSPIC MCU/DSP 64K 64-TQFP
ATMEGA88V-10MU IC AVR MCU 8K 10MHZ 1.8V 32-QFN
ATMEGA88V-10AU IC AVR MCU 8K 10MHZ 1.8V 32TQFP
PIC16C765-I/L IC MCU OTP 8KX14 USB 44PLCC
相關代理商/技術參數(shù)
參數(shù)描述
PIC16C57XTP 制造商:MICROCHIP 功能描述:PIC CONTROLLER
PIC16C57XTSO 制造商:MICROCHIP 功能描述:*
PIC16C57XTSP 制造商:MICROCHIP 功能描述:PIC CONTROLLER
PIC16C58A/JW 制造商:Microchip Technology Inc 功能描述:
PIC16C58A-04/SO 制造商:Microchip Technology Inc 功能描述: