參數資料
型號： pic16cr54c
廠商： Microchip Technology Inc.
英文描述： ROM-Based 8-Bit CMOS Microcontroller Series(8位CMOS微控制器)
中文描述： 基于ROM的8位CMOS微控制器系列（8位的CMOS微控制器）
文件頁數： 13/84頁
文件大?。?/td> 654K
代理商： PIC16CR54C
1998 Microchip Technology Inc.
Preliminary
DS40191A-page 13
PIC16CR54C
4.0
MEMORY ORGANIZATION
PIC16CR54C memory is organized into program
memory and data memory. For devices with more than
512 bytes of program memory, a paging scheme is
used. Program memory pages are accessed using
one or two STATUS register bits. For devices with a
data memory register file of more than 32 registers, a
banking scheme is used. Data memory banks are
accessed using the File Selection Register (FSR).
4.1
Program Memory Organization
The PIC16CR54C has a 9-bit Program Counter (PC)
capable of addressing a 512 x 12 program memory
space (Figure 4-1). Accessing a location above the
physically implemented address will cause a
wraparound.
The reset vector for the PIC16CR54C is at 1FFh. A
NOP at the reset vector location will cause a restart at
location 000h.
FIGURE 4-1:
PIC16CR54C PROGRAM
MEMORY MAP AND STACK
4.2
Data Memory Organization
Data memory is composed of registers, or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: special function registers and
general purpose registers.
The special function registers include the TMR0
register, the Program Counter (PC), the Status
Register, the I/O registers (ports), and the File Select
Register (FSR). In addition, special purpose registers
are used to control the I/O port configuration and
prescaler options.
The general purpose registers are used for data and
control information under command of the instructions.
For the PIC16CR54C, the register file is composed of
7 special function registers and 25 general purpose
registers (Figure 4-2).
PC<8:0>
Stack Level 1
Stack Level 2
U
S
CALL, RETLW
9
000h
1FFh
Reset Vector
0FFh
100h
On-chip
Program
Memory
4.2.1
GENERAL PURPOSE REGISTER FILE
The register file is accessed either directly or indirectly
through the file select register FSR (Section 4.7).
FIGURE 4-2:
PIC16CR54C REGISTER FILE
MAP
4.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers are registers used by
the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The special registers can be classified into two sets.
The special function registers associated with the
“core” functions are described in this section. Those
related to the operation of the peripheral features are
described in the section for each peripheral feature.
File Address
00h
01h
02h
03h
04h
05h
06h
1Fh
INDF
(1)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
General
Purpose
Registers
Note
1:
Not a physical register. See Section 4.7
0Fh
10h
07h
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