參數(shù)資料
型號： PIC16CR74-I/L
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 161/172頁
文件大?。?/td> 2964K
代理商： PIC16CR74-I/L
2007 Microchip Technology Inc.
DS21993C-page 87
PIC16CR7X
11.2
Selecting the A/D Conversion
Clock
The A/D conversion time per bit is defined as TAD. The
A/D conversion requires 9.0 TAD per 8-bit conversion.
The source of the A/D conversion clock is software
selectable. The four possible options for TAD are:
2 TOSC (FOSC/2)
8 TOSC (FOSC/8)
32 TOSC (FOSC/32)
Internal RC oscillator (2-6
μs)
For correct A/D conversions, the A/D conversion clock
(TAD) must be selected to ensure a minimum TAD time
as small as possible, but no less than 1.6
μs.
11.3
Configuring Analog Port Pins
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bits set (input). If the TRIS bit is cleared (out-
put), the digital output level (VOH or VOL) will be
converted.
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
11.4
A/D Conversions
Setting the GO/DONE bit begins an A/D conversion.
When the conversion completes, the 8-bit result is
placed in the ADRES register, the GO/DONE bit is
cleared, and the ADIF flag (PIR<6>) is set.
If both the A/D interrupt bit ADIE (PIE1<6>) and the
peripheral interrupt enable bit PEIE (INTCON<6>) are
set, the device will wake from Sleep whenever ADIF is
set by hardware. In addition, an interrupt will also occur
if the Global Interrupt bit GIE (INTCON<7>) is set.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The ADRES register will
NOT be changed and the ADIF flag will not be set.
After the GO/DONE bit is cleared at either the end of a
conversion, or by firmware, another conversion can be
initiated by setting the GO/DONE bit. Users must still
take into account the appropriate acquisition time for
the application.
11.5
A/D Operation During Sleep
The A/D module can operate during Sleep mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared,
and the result loaded into the ADRES register. If the
A/D interrupt is enabled, the device will wake-up from
Sleep. If the A/D interrupt is not enabled, the A/D
module will then be turned off, although the ADON bit
will remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
11.6
Effects of a Reset
A device Reset forces all registers to their Reset state.
The A/D module is disabled and any conversion in
progress is aborted. All A/D input pins are configured
as analog inputs.
The ADRES register will contain unknown data after a
Power-on Reset.
Note 1: When reading the PORT register, all pins
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an ana-
log input. Analog levels on a digitally
configured input will not affect the conver-
sion accuracy.
2: Analog levels on any pin that is defined as
a digital input, but not as an analog input,
may cause the digital input buffer to
consume current that is out of the
device’s specification.
Note:
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
Note:
For the A/D module to operate in Sleep,
the A/D clock source must be set to RC
(ADCS1:ADCS0 = 11). To perform an A/D
conversion in Sleep, ensure the SLEEP
instruction immediately follows the instruc-
tion that sets the GO/DONE bit.
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