參數(shù)資料
型號(hào): PIC16F707-I/MV
廠商: Microchip Technology
文件頁數(shù): 66/123頁
文件大?。?/td> 0K
描述: MCU PIC 14KB FLASH 40-UQFN
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
特色產(chǎn)品: Extreme Low Power (XLP) Microcontrollers
標(biāo)準(zhǔn)包裝: 73
系列: PIC® XLP™ mTouch™ 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲(chǔ)器容量: 14KB(8K x 14)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 363 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 14x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-UFQFN 裸露焊盤
包裝: 管件
2010-2011 Microchip Technology Inc.
DS41418B-page 47
PIC16(L)F707
4.5.4
PIR1 REGISTER
The PIR1 register contains the interrupt flag bits, as
shown in Register 4-4.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE of the INTCON register.
User
software
should
ensure
the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
REGISTER 4-4:
PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1
R/W-0
R-0
R/W-0
TMR1GIF
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR1GIF: Timer1 Gate Interrupt Flag bit
1
= Timer1 gate is inactive
0
= Timer1 gate is active
bit 6
ADIF: A/D Converter Interrupt Flag bit
1
= A/D conversion complete (must be cleared in software)
0
= A/D conversion has not completed or has not been started
bit 5
RCIF: USART Receive Interrupt Flag bit
1
= The USART receive buffer is full (cleared by reading RCREG)
0
= The USART receive buffer is not full
bit 4
TXIF: USART Transmit Interrupt Flag bit
1
= The USART transmit buffer is empty (cleared by writing to TXREG)
0
= The USART transmit buffer is full
bit 3
SSPIF: Synchronous Serial Port (SSP) Interrupt Flag bit
1
= The Transmission/Reception is complete (must be cleared in software)
0
= Waiting to Transmit/Receive
bit 2
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1
= A Timer1 register capture occurred (must be cleared in software)
0
= No Timer1 register capture occurred
Compare mode:
1
= A Timer1 register compare match occurred (must be cleared in software)
0
= No Timer1 register compare match occurred
PWM mode:
Unused in this mode
bit 1
TMR2IF: Timer2 to PR2 Interrupt Flag bit
1
= A Timer2 to PR2 match occurred (must be cleared in software)
0
= No Timer2 to PR2 match occurred
bit 0
TMR1IF: Timer1 Overflow Interrupt Flag bit
1
= The Timer1 register overflowed (must be cleared in software)
0
= The Timer1 register did not overflow
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