參數(shù)資料
型號: PIC16LF74-I/PTG
廠商: Microchip Technology
文件頁數(shù): 15/104頁
文件大?。?/td> 0K
描述: IC MCU FLASH 4KX14 44TQFP
標準包裝: 160
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 33
程序存儲器容量: 7KB(4K x 14)
程序存儲器類型: 閃存
RAM 容量: 192 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 8x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
2009 Microchip Technology Inc.
DS39682E-page 165
PIC18F45J10 FAMILY
16.4.3.2
Address Masking
Masking an address bit causes that bit to become a
“don’t care”. When one address bit is masked, two
addresses will be Acknowledged and cause an
interrupt. It is possible to mask more than one address
bit at a time, which makes it possible to Acknowledge
up to 31 addresses in 7-Bit Addressing mode and up to
63 addresses in 10-Bit Addressing mode (see
The I2C Slave behaves the same way, whether
address masking is used or not. However, when
address masking is used, the I2C slave can
Acknowledge multiple addresses and cause interrupts.
When this occurs, it is necessary to determine which
address caused the interrupt by checking SSPxBUF.
In 7-Bit Addressing mode, Address Mask bits,
ADMSK<5:1>
(SSPxCON2<5:1>),
mask
the
corresponding address bits in the SSPxADD register. For
any ADMSK bits that are set (ADMSK<n> = 1), the cor-
responding address bit is ignored (SSPxADD<n> = x).
For the module to issue an address Acknowledge, it is
sufficient to match only on addresses that do not have an
active address mask.
In 10-Bit Addressing mode, ADMSK<5:2> bits mask
the corresponding address bits in the SSPxADD regis-
ter. In addition, ADMSK1 simultaneously masks the two
LSbs of the address (SSPxADD<1:0>). For any
ADMSK bits that are active (ADMSK<n> = 1), the cor-
responding address bit is ignored (SSPxADD<n> = x).
Also note that although in 10-Bit Addressing mode, the
upper address bits reuse part of the SSPxADD register
bits, the address mask bits do not interact with those
bits. They only affect the lower address bits.
EXAMPLE 16-2:
ADDRESS MASKING EXAMPLES
Note 1:
ADMSK1 masks the two Least Significant
bits of the address.
2:
The two Most Significant bits of the
address are not affected by address
masking.
7-Bit Addressing:
SSPxADD<7:1>= A0h (1010000) (SSPxADD<0> is assumed to be ‘0’)
ADMSK<5:1> = 00111
Addresses Acknowledged: A0h, A2h, A4h, A6h, A8h, AAh, ACh, AEh
10-Bit Addressing:
SSPxADD<7:0>= A0h (10100000) (the two MSbs of the address are ignored in this example, since they are
not affected by masking)
ADMSK<5:1> = 00111
Addresses Acknowledged: A0h, A1h, A2h, A3h, A4h, A5h, A6h, A7h, A8h, A9h, AAh, ABh, ACh, ADh, AEh, AFh
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