參數(shù)資料
型號(hào): PIC17C766T-33I/PT
廠商: Microchip Technology
文件頁(yè)數(shù): 109/159頁(yè)
文件大小: 0K
描述: IC MCU OTP 16KX16 A/D 80TQFP
標(biāo)準(zhǔn)包裝: 1,200
系列: PIC® 17C
核心處理器: PIC
芯體尺寸: 8-位
速度: 33MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 66
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: OTP
RAM 容量: 902 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 帶卷 (TR)
配用: XLT80PT3-ND - SOCKET TRAN ICE 80MQFP/TQFP
AC174011-ND - MODULE SKT PROMATEII 80TQFP
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)當(dāng)前第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)
PIC17C7XX
DS30289B-page 52
2000 Microchip Technology Inc.
7.2.2.2
CPU Status Register (CPUSTA)
The CPUSTA register contains the status and control
bits for the CPU. This register has a bit that is used to
globally enable/disable interrupts. If only a specific
interrupt is desired to be enabled/disabled, please refer
to the Interrupt Status (INTSTA) register and the
Peripheral Interrupt Enable (PIE) registers. The
CPUSTA register also indicates if the stack is available
and contains the Power-down (PD) and Time-out (TO)
bits. The TO, PD, and STKAV bits are not writable.
These bits are set and cleared according to device
logic. Therefore, the result of an instruction with the
CPUSTA register as destination may be different than
intended.
The POR bit allows the differentiation between a
Power-on Reset, external MCLR Reset, or a WDT
Reset. The BOR bit indicates if a Brown-out Reset
occurred.
REGISTER 7-2:
CPUSTA REGISTER (ADDRESS: 06h, UNBANKED)
Note 1: The BOR status bit is a don’t care and is
not necessarily predictable if the Brown-out
circuit is disabled (when the BODEN bit in
the Configuration word is programmed).
U-0
R-1
R/W-1
R-1
R/W-0
R/W-1
STKAV
GLINTD
TO
PD
POR
BOR
bit 7
bit 0
bit 7-6
Unimplemented: Read as '0'
bit 5
STKAV: Stack Available bit
This bit indicates that the 4-bit stack pointer value is Fh, or has rolled over from Fh
→ 0h
(stack overflow).
1
= Stack is available
0
= Stack is full, or a stack overflow may have occurred (once this bit has been cleared by a
stack overflow, only a device RESET will set this bit)
bit 4
GLINTD: Global Interrupt Disable bit
This bit disables all interrupts. When enabling interrupts, only the sources with their enable bits
set can cause an interrupt.
1
= Disable all interrupts
0
= Enables all unmasked interrupts
bit 3
TO: WDT Time-out Status bit
1
= After power-up, by a CLRWDT instruction, or by a SLEEP instruction
0
= A Watchdog Timer time-out occurred
bit 2
PD: Power-down Status bit
1
= After power-up or by the CLRWDT instruction
0
= By execution of the SLEEP instruction
bit 1
POR: Power-on Reset Status bit
1
= No Power-on Reset occurred
0
= A Power-on Reset occurred (must be set by software)
bit 0
BOR: Brown-out Reset Status bit
When BODEN Configuration bit is set (enabled):
1
= No Brown-out Reset occurred
0
= A Brown-out Reset occurred (must be set by software)
When BODEN Configuration bit is clear (disabled):
Don’t care
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR Reset
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
相關(guān)PDF資料
PDF描述
36FMN-BMTTN-A-TF CONN FMN HSNG 36POS STAG NOR SMD
PIC12F675T-E/SN IC MCU CMOS 1K FLASH W/AD 8-SOIC
PIC12LF1501-I/P IC MCU 8BIT 1.75KB FLASH 8-PDIP
PIC16F505-I/ST IC MCU FLASH 1KX12 14TSSOP
PIC12F510-I/P IC PIC MCU FLASH 1.5KB 8DIP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC17LC42A-08/L 功能描述:8位微控制器 -MCU 4KB 232 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17LC42A-08/P 功能描述:8位微控制器 -MCU 4KB 232 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17LC42A-08/PQ 功能描述:8位微控制器 -MCU 4KB 232 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17LC42A-08/PT 功能描述:8位微控制器 -MCU 4KB 232 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17LC42A-08I/L 功能描述:8位微控制器 -MCU 4KB 232 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT